HD64F3337YCP16V Renesas Electronics America, HD64F3337YCP16V Datasheet - Page 489

• Manufacturer Part Number: HD64F3337YCP16V
• Description: MCU 3/5V 60K PB-FREE 84-PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16V

• Core Size: 8-Bit
• Program Memory Size: 60KB (60K x 8)
• Oscillator Type: Internal
• Core Processor: H8/300
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• No. Of I/o's: 74
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 6
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PLCC
• Controller Family/series: H8/300
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

20.4.6
Flowchart for Erasing One Block
Address + 1
Erasing Flowchart and Sample Program
address
No
(set bit of block to be erased to 1)
Dummy write to verify address
(flash memory latches address)
(clear bit of erased block to 0)
Write 0 data in all addresses
Verify
Clear erase block register
Enable watchdog timer
Select erase-verify mode
to be erased (prewrite)
Set top address in block
Set erase block register
Disable watchdog timer
(EV bit = 1 in FLMCR)
(E bit = 1 in FLMCR)
End of block erase
Select erase mode
as verify address
OK
Wait (t
*4
Wait (t
Last address?
Wait (x) ms
Clear EV bit
Clear E bit
(read data=H'FF?)
n = 1
Start
VS
VS
Figure 20.9 Erasing Flowchart
2) s
1) s
Yes
*5
*6
*6
*1
*2
*3
No go
Erasing ends
Clear EV bit
Erase error
Notes: *1 Program all addresses to be erased
n
N?
Yes
*6
*2 Set the watchdog timer overflow
*3 For the erase-verify dummy write,
*4 Read the data to be verified with a
*5 The erase time x is successively
*6 t
by following the prewrite flowchart.
interval to the value indicated in
table 20.8.
write H'FF with a byte transfer
instruction.
byte transfer instruction. When
erasing two or more blocks, clear
the bits of erased blocks in the
erase block registers, so that only
unerased blocks will be erased
again.
incremented by the initial set value
value of 6.25 ms or less should be
set, and the time for one erasure
should be 50 ms or less.
t
N:
VS
VS
2
1: 4 s or more
2: 2 s or more
n–1
602
(n = 1, 2, 3, 4). An initial
No
Erase-verify ends
Double erase time
n + 1
(x
n
2 x)
4?
n
No
Yes
457