HD64F3337YCP16V Renesas Electronics America, HD64F3337YCP16V Datasheet - Page 220

MCU 3/5V 60K PB-FREE 84-PLCC

HD64F3337YCP16V

Manufacturer Part Number
HD64F3337YCP16V
Description
MCU 3/5V 60K PB-FREE 84-PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16V

Core Size
8-Bit
Program Memory Size
60KB (60K x 8)
Oscillator Type
Internal
Core Processor
H8/300
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
No. Of I/o's
74
Ram Memory Size
1KB
Cpu Speed
16MHz
No. Of Timers
6
No. Of Pwm Channels
2
Digital Ic Case Style
PLCC
Controller Family/series
H8/300
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3337YCP16V
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COILMASTER
Quantity:
30 000
Part Number:
HD64F3337YCP16V
Manufacturer:
RENESAS
Quantity:
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Part Number:
HD64F3337YCP16V
Manufacturer:
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Increment Caused by Changing of Internal Clock Source: When an internal clock source is
changed, the changeover may cause FRC to increment. This depends on the time at which the
clock select bits (CKS1 and CKS0) are rewritten, as shown in table 8.5.
The pulse that increments FRC is generated at the falling edge of the internal clock source. If
clock sources are changed when the old source is high and the new source is low, as in case no. 3
in table 8.5, the changeover generates a falling edge that triggers the FRC increment clock pulse.
Switching between an internal and external clock source can also cause FRC to increment.
Table 8.5
No.
1
2
188
Description
Low
CKS1 and CKS0 are
rewritten while both
clock sources are low.
Low
CKS1 and CKS0 are
rewritten while old
clock source is low and
new clock source is high.
Effect of Changing Internal Clock Sources
low:
high:
Timing
Old clock
source
New clock
source
FRC clock
pulse
FRC
Old clock
source
New clock
source
FRC clock
pulse
FRC
N
N
CKS rewrite
N + 1
CKS rewrite
N + 1
N + 2

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