HD64F3337YCP16V Renesas Electronics America, HD64F3337YCP16V Datasheet - Page 389

• Manufacturer Part Number: HD64F3337YCP16V
• Description: MCU 3/5V 60K PB-FREE 84-PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16V

• Core Size: 8-Bit
• Program Memory Size: 60KB (60K x 8)
• Oscillator Type: Internal
• Core Processor: H8/300
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• No. Of I/o's: 74
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 6
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PLCC
• Controller Family/series: H8/300
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Bit 6—D/A Output Enable 0 (DAOE0): Controls analog output from the D/A converter.
Bit 6: DAOE0
0
1
Bit 5—D/A Enable (DAE): Controls D/A conversion, in combination with bits DAOE0 and
DAOE1. D/A conversion is controlled independently on channels 0 and 1 when DAE = 0.
Channels 0 and 1 are controlled together when DAE = 1.
The decision to output the converted results is always controlled independently by DAOE0 and
DAOE1.
Bit 7: DAOE1
0
1
When the DAE bit is set to 1, analog power supply current drain is the same as during A/D and
D/A conversion, even if the DAOE0 and DAOE1 bits in DACR and the ADST bit in ADSCR are
cleared to 0.
Bits 4 to 0—Reserved: These bits cannot be modified and are always read as 1.
Bit 6: DAOE0
0
1
0
1
Description
Analog output at DA
D/A conversion is enabled on channel 0. Analog output is enabled at DA
Bit 5: DAE
—
0
1
0
1
—
0
is disabled.
Description
Disabled on channels 0 and 1.
Enabled on channel 0.
Disabled on channel 1.
Enabled on channels 0 and 1.
Disabled on channel 0.
Enabled on channel 1.
Enabled on channels 0 and 1.
Enabled on channels 0 and 1.
0
.
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