HD64F3337YCP16V Renesas Electronics America, HD64F3337YCP16V Datasheet - Page 179

MCU 3/5V 60K PB-FREE 84-PLCC

HD64F3337YCP16V

Manufacturer Part Number
HD64F3337YCP16V
Description
MCU 3/5V 60K PB-FREE 84-PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16V

Core Size
8-Bit
Program Memory Size
60KB (60K x 8)
Oscillator Type
Internal
Core Processor
H8/300
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
No. Of I/o's
74
Ram Memory Size
1KB
Cpu Speed
16MHz
No. Of Timers
6
No. Of Pwm Channels
2
Digital Ic Case Style
PLCC
Controller Family/series
H8/300
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Port 8 Data Direction Register (P8DDR)
P8DDR is an 8-bit readable/writable register that controls the input/output direction of each pin in
port 8. A pin functions as an output pin if the corresponding P8DDR bit is set to 1, and as an input
pin if this bit is cleared to 0. P8DDR is a write-only register. Read data is invalid. If read, all bits
always read 1. Bit 7 is a reserved bit that always reads 1.
P8DDR is initialized to H'80 by a reset and in hardware standby mode. In software standby mode
P8DDR retains its existing values, so if a transition to software standby mode occurs while a
P8DDR bit is set to 1, the corresponding pin remains in the output state.
Port 8 Data Register (P8DR)
P8DR is an 8-bit register that stores data for pins P8
reads 1.
When a P8DDR bit is set to 1, if port 8 is read, the value in P8DR is obtained directly, regardless
of the actual pin state. When a P8DDR bit is cleared to 0, if port 8 is read the pin state is obtained.
This also applies to pins used by on-chip supporting modules.
P8DR is initialized to H'80 by a reset and in hardware standby mode. In software standby mode it
retains its existing values.
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
7
1
7
1
P8
R/W
P8
6
W
6
DDR P8
0
6
0
6
R/W
P8
5
W
5
DDR P8
0
5
0
5
R/W
P8
4
W
4
DDR P8
0
4
0
6
to P8
4
0
. Bit 7 is a reserved bit that always
R/W
P8
3
W
3
DDR P8
0
3
0
3
R/W
P8
2
W
2
DDR P8
0
2
0
2
R/W
P8
1
W
1
DDR P8
0
1
0
1
R/W
P8
0
W
0
DDR
0
0
0
0
147

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