MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 521
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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26.3.2.9 Port SD Pin Assignment Register (PSDPAR)
The PSDPAR controls the pin function of port SD.
26.3.2.10 Port AS Pin Assignment Register (PASPAR)
The PASPAR controls the pin function of port AS.
Freescale Semiconductor
Address
1
Address
Reset
Reset
Reset state determined during reset configuration. PJPAn = 1 in master mode and 0 in all other modes.
Reset See Note 1
R/W:
R/W:
Field
Field
R/W:
Field
Bits
6–0
7
PSDPA
15
R/W
7
7
PASPA3
Figure 26-23. Port SD Pin Assignment Register (PSDPAR)
Figure 26-24. Port AS Pin Assignment Register (PASPAR)
1
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
6
PSDPA
6
Name
—
Table 26-13. PSDPAR Field Descriptions
—
R
5
Port SD pin assignment. This bit configures the port SD[5:0] pins
for their primary functions (SRAS, SCAS, DRAMW,
SDRAM_CS[1:0], SCKE) or digital I/O.
1 Port SD[5:0] pins configured for primary functions (SRAS,
0 Port SD[5:0] pin configured for digital I/O
Reserved, should be cleared.
PASPA2
SCAS, DRAMW, SDRAM_CS[1:0], SCKE)
IPSBAR + 0x10_0055
IPSBAR + 0x10_0056
12
4
0000_0000
0000_0000
R/W
000_0000
11
—
R
3
Description
PASPA5
PASPA1
10
2
R/W
9
1
General Purpose I/O Module
PASPA4
PASPA0
0
8
0
26-21
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