MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 10
MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- Current page: 10 of 766
- Download datasheet (9Mb)
9.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
9.2 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
9.3 Low-power Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2
9.4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2
9.5 Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4
9.6 Memory Map and Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9.7 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-10
10.1 68K/ColdFire Interrupt Architecture Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
x
9.2.1 Normal PLL Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
9.2.2 1:1 PLL Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
9.2.3 External Clock Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
9.5.1 EXTAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4
9.5.2 XTAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9.5.3 CLKOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9.5.4 CLKMOD[1:0] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9.5.5 RSTOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9.6.1 Module Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9.6.2 Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-6
9.7.1 System Clock Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-10
9.7.2 Clock Operation During Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-11
9.7.3 System Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-11
9.7.4 PLL Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-11
10.1.1 Interrupt Controller Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2
8.6.3.3 Grouped Peripheral Access Control Registers
9.6.2.1 Synthesizer Control Register (SYNCR) . . . . . . . . . . . . . . . . . . . . . . . . 9-6
9.6.2.2 Synthesizer Status Register (SYNSR) . . . . . . . . . . . . . . . . . . . . . . . . . 9-8
9.7.4.1 Phase and Frequency Detector (PFD) . . . . . . . . . . . . . . . . . . . . . . . . 9-12
9.7.4.2 Charge Pump/Loop Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-13
9.7.4.3 Voltage Control Output (VCO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-13
9.7.4.4 Multiplication Factor Divider (MFD) . . . . . . . . . . . . . . . . . . . . . . . . . . 9-13
9.7.4.5 PLL Lock Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-13
9.7.4.6 PLL Loss of Lock Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-14
9.7.4.7 PLL Loss of Lock Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-15
9.7.4.8 Loss of Clock Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-15
9.7.4.9 Loss of Clock Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-15
9.7.4.10 Alternate Clock Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-15
9.7.4.11 Loss of Clock in Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-16
(GPACR0 & GPACR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-15
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Interrupt Controller Modules
Clock Module
Chapter 10
Chapter 9
Freescale Semiconductor
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