HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 96

MPU 5V 0K 100-QFP

HD6417011VX20V

Manufacturer Part Number
HD6417011VX20V
Description
MPU 5V 0K 100-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7010r
Datasheet

Specifications of HD6417011VX20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
POR, PWM
Number Of I /o
11
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417011VX20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
7.3.3
Idle cycles can be inserted to prevent extension of the RD signal or WRx signal assert period
beyond the length of the CSn signal assert period by setting the SW3–SW0 bits of BCR2. This
allows for flexible interfaces with external circuitry. The timing is shown in figure 7.6. T
cycles are added respectively before and after the ordinary cycle. Only CSn is asserted in these
cycles; RD and WRx signals are not. Further, data is extended up to the T
effective for gate arrays and the like, which have slower write operations.
Read
Write
CS Assert Period Extension
Address
WRx
Data
Data
CSn
RD
CK
Figure 7.6 CS Assert Period Extension Function
T
h
T
1
T
2
T
f
cycle, which is
f
h
and T
f
85

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