HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 61

• Manufacturer Part Number: HD6417011VX20V
• Description: MPU 5V 0K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7010r

Specifications of HD6417011VX20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: POR, PWM
• Number Of I /o: 11
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

5.3
Address errors occur when instructions are fetched or data read or written, as shown in table 5.6.
Table 5.6
Bus Cycle
Type
Instruction fetch
Data read/write
Note: See section 7, Bus State Controller.
5.3.1
When an address error occurs, the bus cycle in which the address error occurred ends. When the
executing instruction then finishes, address error exception processing starts up. The CPU operates
as follows:
1. The status register (SR) is saved to the stack.
2. The program counter (PC) is saved to the stack. The PC value saved is the start address of the
3. The exception service routine start address is fetched from the exception processing vector
50
instruction to be executed after the last executed instruction.
table that corresponds to the address error that occurred and the program starts executing from
that address. The jump that occurs is not a delayed branch.
Address Errors
Address Error Exception Processing
Bus Cycles and Address Errors
Bus Cycle Description
Instruction fetched from even address
Instruction fetched from odd address
Instruction fetched from other than on-chip peripheral
module space*
Instruction fetched from on-chip peripheral module
space*
Word data accessed from even address
Word data accessed from odd address
Longword data accessed from other than a longword
boundary
Byte or word data accessed in on-chip peripheral
module space*
Longword data accessed in 16-bit on-chip peripheral
module space*
Longword data accessed in 8-bit on-chip peripheral
module space*
Address Errors
None (normal)
Address error occurs
None (normal)
Address error occurs
None (normal)
Address error occurs
Address error occurs
None (normal)
None (normal)
Address error occurs