HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 206

• Manufacturer Part Number: HD6417011VX20V
• Description: MPU 5V 0K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7010r

Specifications of HD6417011VX20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: POR, PWM
• Number Of I /o: 11
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit 4: O/E
0
1
Bit 3: STOP
0
1
Bit 2: MP
0
1
196
Bit 4—Parity Mode (O/E): Selects even or odd parity when parity bits are added and checked.
The O/E setting is used only when the parity enable bit (PE) is set to 1 to enable parity addition
and check. The O/E setting is ignored when parity addition and check is disabled.
Bit 3—Stop Bit Length (STOP): Selects one or two bits as the stop bit length.
In receiving, only the first stop bit is checked, regardless of the STOP bit setting. If the second
stop bit is 1, it is treated as a stop bit, but if the second stop bit is 0, it is treated as the start bit
of the next incoming character.
Bit 2—Multiprocessor Mode (MP): Selects multiprocessor format. When multiprocessor
format is selected, settings of the parity enable (PE) and parity mode (O/E) bits are ignored.
For the multiprocessor communication function, see section 12.3.3, Multiprocessor
Communication.
Bits 1 and 0—Clock Select 1 and 0 (CKS1 and CKS0): These bits select the internal clock
source of the on-chip baud rate generator. Four clock sources are available; , /4, /16, or
section 12.2.8, Bit Rate Register.
/64. For further information on the clock source, bit rate register settings, and baud rate, see
Description
Even parity (initial value). If even parity is selected, the parity bit is
added to transmit data to make an even number of 1s in the transmitted
character and parity bit combined. Receive data is checked to see if it
has an even number of 1s in the received character and parity bit
combined.
Odd parity. If odd parity is selected, the parity bit is added to transmit
data to make an odd number of 1s in the transmitted character and
parity bit combined. Receive data is checked to see if it has an odd
number of 1s in the received character and parity bit combined.
Description
One stop bit (initial value). In transmitting, a single bit of 1 is added at
the end of each transmitted character.
Two stop bits. In transmitting, two bits of 1 are added at the end of each
transmitted character.
Description
Multiprocessor function disabled (initial value)
Multiprocessor format selected