HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 250

• Manufacturer Part Number: HD6417011VX20V
• Description: MPU 5V 0K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7010r

Specifications of HD6417011VX20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: POR, PWM
• Number Of I /o: 11
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

13.4
The A/D converter operates by successive approximations with 10-bit resolution. It has two
operating modes: single mode and scan mode.. The operation in these two modes is described
below.
13.4.1
Single mode should be selected for A/D conversion on only one channel. A/D conversion starts
when the ADST bit in the A/D control/status register (ADCSR) is set to 1 by software or MTU
trigger input. The ADST bit remains set to 1 during A/D conversion, and is automatically cleared
to 0 when conversion ends.
When conversion ends, the ADF bit in ADCSR is set to 1. If the ADIE bit in ADCSR is also 1, an
ADI interrupt is requested. To clear the ADF bit, first read ADF when set to 1, then write 0 in
ADF.
To prevent incorrect operation, A/D conversion should be halted by clearing the ADST bit to 0
before changing the mode or analog input channel. After the change is made, A/D conversion is
restarted by setting the ADST bit to 1 (the mode or channel change and setting of the ADST bit
can be carried out simultaneously).
An example of the operation when analog input channel 1 (AN1) is selected and A/D conversion
is performed in single mode is described below. Figure 13.3 shows a timing diagram for this
example.
1. Single mode is selected (SCAN = 0), input channel AN1 is selected (CH2 = CH1 = 0, CH0 =
2. When A/D conversion is completed, the result is transferred to ADDRB. At the same time
3. Since ADF = 1 and ADIE = 1, an ADI interrupt is requested.
4. The A/D interrupt service routine is started.
5. The routine reads ADF set to 1, then writes 0 in ADF.
6. The routine reads and processes the conversion result (ADDRB).
7. Execution of the A/D interrupt service routine ends. After this, if the ADST bit is set to 1, A/D
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1), the A/D interrupt request is enabled (ADIE = 1), and A/D conversion is started (ADST =
1).
ADF is set to 1, ADST is cleared to 0, and the A/D converter becomes idle.
conversion starts again and steps 2 to 7 are repeated.
Operation
Single Mode (SCAN = 0)