HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 23

MPU 5V 0K 100-QFP

HD6417011VX20V

Manufacturer Part Number
HD6417011VX20V
Description
MPU 5V 0K 100-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7010r
Datasheet

Specifications of HD6417011VX20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
POR, PWM
Number Of I /o
11
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417011VX20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
2.1.3
System registers consist of four 32-bit registers: high and low multiply and accumulate registers
(MACH and MACL), the procedure register (PR), and the program counter (PC). The multiply
and accumulate registers store the results of multiply and accumulate operations. The procedure
register stores the return address from the subroutine procedure. The program counter stores
program addresses to control the flow of the processing. Figure 2.3 shows a system register.
2.1.4
Table 2.1 lists the values of the registers after reset.
Table 2.1
Classification
General registers
Control registers
System registers
31
31
31
System Registers
Initial Values of Registers
Initial Values of Registers
Register
R0–R14
R15 (SP)
SR
GBR
VBR
MACH, MACL, PR
PC
MACH
MACL
PR
PC
Figure 2.3 System Registers
Initial Value
Undefined
Value of the stack pointer in the vector address table
Bits I3–I0 are 1111 (H'F), reserved bits are 0, and other
bits are undefined
Undefined
H'00000000
Undefined
Value of the program counter in the vector address table
0
0
0
Multiply and accumulate (MAC)
registers high and low (MACH,
MACL): Stores the results of
multiply and accumulate operations.
Procedure register (PR): Stores
a return address from a
subroutine procedure.
Program counter (PC): Indicates
the fourth byte (second instruction)
after the current instruction.
11

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