HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 170

MPU 5V 0K 100-QFP

HD6417011VX20V

Manufacturer Part Number
HD6417011VX20V
Description
MPU 5V 0K 100-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7010r
Datasheet

Specifications of HD6417011VX20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
POR, PWM
Number Of I /o
11
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417011VX20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(7) Operation when Error Occurs during PWM Mode 2 Operation, and Operation is
Restarted in Normal Mode: Figure 8.55 shows an explanatory diagram of the case where an
error occurs in PWM mode 2 and operation is restarted in normal mode after re-setting.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Set normal mode.
11. Initialize the pins with TIOR.
12. Set MTU output with the PFC.
13. Operation is restarted by TSTR.
MTU output
n = 0, 2, 4–7, 12–14
Port output
TIOC*A
TIOC*B
After a reset, MTU output is low and ports are in the high-impedance state.
Set PWM mode 2.
compare-match occurrence. In PWM mode 2, the cycle register pins are not initialized. In the
example, TIOC*A is the cycle register.)
Set MTU output with the PFC.
The count operation is started by TSTR.
Output goes low on compare-match occurrence.
An error occurs.
Set port output with the PFC and output the inverse of the active level.
The count operation is stopped by TSTR.
Initialize the pins with TIOR. (The example shows initial high output, with low output on
PEn
PEn
Figure 8.55 Error Occurrence in PWM Mode 2, Recovery in Normal Mode
RESET
1
(PWM2)
TMDR
2
Z
Z
0 out)
TIOR
(1 init
3
• Not initialized (cycle register)
(MTU)
PFC
4
TSTR
(1)
5
Match
6
occurs
Error
7
(PORT)
PFC
8
TSTR
(0)
9
(normal)
TMDR
10
0 out)
TIOR
(1 init
11
(MTU)
PFC
12
TSTR
(1)
13
159

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