HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 112

• Manufacturer Part Number: HD6417011VX20V
• Description: MPU 5V 0K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7010r

Specifications of HD6417011VX20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: POR, PWM
• Number Of I /o: 11
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Channel 0: TIOR0L
Note: When the TGRC or TGRD registers are set for buffer operation, these settings become
Channel 0 (TIOR0H Register):
Bit 3:
IOA3
0
1
Bits 7–4—Reserved. These bits always read 0. The write value should always be 0.
Bits 3–0—I/O Control C3–C0 (IOC3–IOC0): These bits set the TGRC register function.
Bits 7–4—Reserved. These bits always read 0. The write value should always be 0.
Bits 3–0—I/O Control A3–A0 (IOA3–IOA0): These bits set the TGR0A register function.
Initial value:
ineffective and the operation is as a buffer register.
Bit 2:
IOA2
0
1
0
1
R/W:
Bit:
Bit 1:
IOA1
0
1
0
1
0
1
0
1
—
Bit 0:
IOA0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
7
0
R
Description
TGR0A
is an
output
compare
register
TGR0A
is an
input
capture
register
—
6
0
R
—
5
0
R
Output disabled (initial value)
Initial
output
is 0
Output disabled
Initial
output
is 1
Capture
input source
is the
TIOC0A pin
Capture
input source
is channel 1/
count clock
—
4
0
R
IOC3
R/W
3
0
Output 0 on compare-match
Output 1 on compare-match
Toggle output on compare-match
Output 0 on compare-match
Output 1 on compare-match
Toggle output on compare-match
Input capture on rising edge
Input capture on falling edge
Input capture on both edges
Input capture
on TCNT1
count up/count down
IOC2
R/W
2
0
IOC1
R/W
1
0
IOC0
R/W
0
0
101