R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 949

• Manufacturer Part Number: R4F24269NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24269NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2426, H8S/2426R, H8S/2424 Group
15.6.2
Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then
initialize the SCI as described in a sample flowchart in figure 15.15. When the operating mode,
transfer format, etc., is changed, the TE and RE bits must be cleared to 0 before making the
change. When the TE bit is cleared to 0, the TDRE flag is set to 1. Note that clearing the RE bit to
0 does not change the contents of the RDRF, PER, FER, and ORER flags, or the contents of RDR.
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
SCI Initialization (Clocked Synchronous Mode)
Note: In simultaneous transmit and receive operations, the TE and RE bits should
Set TE and RE bits in SCR to 1, and
set RIE, TIE, TEIE, and MPIE bits
Clear TE and RE bits in SCR to 0
Set CKE1 and CKE0 bits in SCR
Set data transfer format in
both be cleared to 0 or set to 1 simultaneously.
1-bit interval elapsed?
Start of initialization
Set value in BRR
SMR and SCMR
<Transfer start>
(TE, RE bits 0)
Figure 15.15 Sample SCI Initialization Flowchart
Yes
Wait
No
[4]
[2]
[3]
[1]
[1] Set the clock selection in SCR. Be sure
[2] Set the data transfer format in SMR
[3] Write a value corresponding to the bit
[4] Wait at least one bit interval, then set
to clear bits RIE, TIE, TEIE, and MPIE,
TE and RE, to 0.
and SCMR.
rate to BRR. (Not necessary if an
external clock is used.)
the TE and RE bits in SCR to 1.
Also set the RIE, TIE, TEIE, and MPIE
bits.
Setting the TE and RE bits enable the
TxD and RxD pins to be used.
Section 15 Serial Communication Interface (SCI, IrDA)
Page 919 of 1372