R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 1105

• Manufacturer Part Number: R4F24269NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24269NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2426, H8S/2426R, H8S/2424 Group
19.5
The SSU interrupt requests are an overrun error, a conflict error, a receive data register full,
transmit data register empty, and a transmit end interrupts.
Since both an overrun error and a conflict error interrupts are allocated to the SSERI vector
address, and both a transmit data register empty and a transmit end interrupts are allocated to the
SSTXI vector address, the interrupt source should be decided by their flags. Table 19.7 lists the
interrupt sources.
When an interrupt condition shown in table 19.7 is satisfied, an interrupt is requested. Clear the
interrupt source by CPU or DMAC data transfer.
Table 19.7 Interrupt Sources
19.6
19.6.1
SSU operation can be disabled or enabled using the module stop control register. The initial
setting is for the SSU to be halted. Register access is enabled by clearing the module stop state.
For details, see section 23, Power-Down Modes.
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Channel Abbreviation Interrupt Source
0
SSERI0
SSRXI0
SSTXI0
Interrupt Requests
Usage Note
Module Stop Function Setting
Overrun error
Conflict error
Receive data register full
Transmit data register empty
Transmit end
Symbol Interrupt Condition
OEI0
CEI0
RXI0
TXI0
TEI0
Section 19 Synchronous Serial Communication Unit (SSU)
(RIE = 1) • (ORER = 1)
(CEIE = 1) • (CE = 1)
(RIE = 1) • (RDRF = 1)
(TIE = 1) • (TDRE = 1)
(TEIE = 1) • (TEND = 1)
Page 1075 of 1372
DMAC
Activation
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