R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 1015

• Manufacturer Part Number: R4F24269NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24269NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2426, H8S/2426R, H8S/2424 Group
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
No
Set RIE = 0 in ICIER
Read STOP in ICSR
Clear RDRF in ICSR
Clear STOP in ICSR
Set RIE = 1 in ICIER
STOP=1 ?
Yes
Figure 16.17 Sample Flowchart for Slave Receive Mode
[12]
[13]
[14]
[15]
Additional information: If only one byte is received, steps [2] through [6] are omitted following step [1],
Note: *
No
No
No
No
In slave receiver mode, even if the actual and received slave addresses did not match,
received data are stored in ICDRR, after which the RDRF in ICSR is set.
Checking whether or not the addresses matched is thus required.
Set ACKBT=0 in ICIER
Set ACKBT=1 in ICIER
Read RDRF in ICSR
Dummy read ICDRR
Read RDRF in ICSR
Read RDRF in ICSR
Slave receive mode
Read AAS in ICSR
Clear AAS in ICSR
Read ICDRR
Read ICDRR
Read ICDRR
Last receive
RDRF=1 ?
RDRF=1 ?
RDRF=1 ?
AAS=1 ?
End
- 1?
and processing jumps to step [7]. Step [8] is ICDRR dummy read.
Yes
Yes
Yes
No
Yes
Yes
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[1] Determination of slave address*
[2] Clear the flag AAS.
[3] Set the acknowledge for the transmit device.
[4] Dummy read ICDRR.
[5] Wait the reception end of 1 byte.
[6] Check if the (last receive - 1).
[7] Read the received data.
[8] Set the acknowledge for the last byte.
[9] Read the received data of the (last byte - 1).
[10] Wait the reception end of the last byte.
[11] Read the received data of the last byte.
[12] Receive-data-full interrupt requests
[13] Determined by the stop condition
[14] Clear the RDRF and STOP flags.
[15] Receive-data-full interrupt requests
Use receive-data-full interrupts to determine
whether the slave address matches.
• If the slave address did match (AAS = 1),
• If the slave address did not match (AAS = 0),
are disabled.
detection flag.
are enabled.
execute steps [2] to [11].
execute steps [12] to [15].
Section 16 I2C Bus Interface 2 (IIC2)
Page 985 of 1372