R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 23

• Manufacturer Part Number: R4F24269NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24269NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.5 Multiprocessor Communication Function.......................................................................... 911
15.6 Operation in Clocked Synchronous Mode ......................................................................... 918
15.7 Operation in Smart Card Interface Mode........................................................................... 927
15.8 IrDA Operation .................................................................................................................. 940
15.9 Interrupt Sources................................................................................................................ 944
15.10 Usage Notes ....................................................................................................................... 948
15.4.2 Receive Data Sampling Timing and Reception Margin
15.4.3 Clock..................................................................................................................... 903
15.4.4 SCI Initialization (Asynchronous Mode).............................................................. 904
15.4.5 Data Transmission (Asynchronous Mode) ........................................................... 905
15.4.6 Serial Data Reception (Asynchronous Mode) ...................................................... 907
15.5.1 Multiprocessor Serial Data Transmission ............................................................. 912
15.5.2 Multiprocessor Serial Data Reception .................................................................. 914
15.6.1 Clock..................................................................................................................... 918
15.6.2 SCI Initialization (Clocked Synchronous Mode).................................................. 919
15.6.3 Serial Data Transmission (Clocked Synchronous Mode) ..................................... 920
15.6.4 Serial Data Reception (Clocked Synchronous Mode) .......................................... 923
15.6.5 Simultaneous Serial Data Transmission and Reception
15.7.1 Pin Connection Example ...................................................................................... 927
15.7.2 Data Format (Except for Block Transfer Mode)................................................... 928
15.7.3 Block Transfer Mode ............................................................................................ 929
15.7.4 Receive Data Sampling Timing and Reception Margin ....................................... 930
15.7.5 Initialization.......................................................................................................... 932
15.7.6 Data Transmission (Except for Block Transfer Mode)......................................... 933
15.7.7 Serial Data Reception (Except for Block Transfer Mode).................................... 936
15.7.8 Clock Output Control............................................................................................ 938
15.9.1 Interrupts in Normal Serial Communication Interface Mode ............................... 944
15.9.2 Interrupts in Smart Card Interface Mode .............................................................. 946
15.10.1 Module Stop Function Setting .............................................................................. 948
15.10.2 Break Detection and Processing ........................................................................... 948
15.10.3 Mark State and Break Sending ............................................................................. 948
15.10.4 Receive Error Flags and Transmit Operations
15.10.5 Relation between Writes to TDR and the TDRE Flag .......................................... 949
15.10.6 Restrictions on Use of DMAC or DTC................................................................. 949
15.10.7 Operation in Case of Mode Transition.................................................................. 950
in Asynchronous Mode......................................................................................... 902
(Clocked Synchronous Mode) .............................................................................. 925
(Clocked Synchronous Mode Only) ..................................................................... 948
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