R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 27
R4F24269NVFQV
Manufacturer Part Number
R4F24269NVFQV
Description
MCU 256KB FLASH 64K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet
1.R4F24268NVZFQV.pdf
(1406 pages)
Specifications of R4F24269NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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21.10 Serial Communication Interface Specification for Boot Mode........................................ 1102
21.11 Programmer Mode ........................................................................................................... 1132
Section 22 Clock Pulse Generator ...................................................................1133
22.1 Register Descriptions ....................................................................................................... 1134
22.2 Oscillator.......................................................................................................................... 1137
22.3 System-Clock PLL Circuit and Divider........................................................................... 1140
22.4 Usage Notes ..................................................................................................................... 1141
Section 23 Power-Down Modes ......................................................................1143
23.1 Register Descriptions ....................................................................................................... 1147
23.2 Operation ......................................................................................................................... 1153
23.3 φ Clock Output Control.................................................................................................... 1161
23.4 SDRAMφ Clock Output Control ..................................................................................... 1162
23.5 Usage Notes ..................................................................................................................... 1163
22.1.1 System Clock Control Register (SCKCR) .......................................................... 1134
22.1.2 PLL Control Register (PLLCR).......................................................................... 1136
22.2.1 Connecting a Crystal Resonator.......................................................................... 1137
22.2.2 External Clock Input........................................................................................... 1138
22.4.1 Notes on Clock Pulse Generator ......................................................................... 1141
22.4.2 Notes on Resonator............................................................................................. 1141
22.4.3 Notes on Board Design ....................................................................................... 1142
23.1.1 Standby Control Register (SBYCR) ................................................................... 1147
23.1.2 Module Stop Control Registers H and L (MSTPCRH, MSTPCRL) .................. 1149
23.1.3 Extension Module Stop Control Registers H and L
23.1.4 RAM Module Stop Control Registers H and L
23.2.1 Clock Division Mode.......................................................................................... 1153
23.2.2 Sleep Mode ......................................................................................................... 1154
23.2.3 Software Standby Mode...................................................................................... 1155
23.2.4 Hardware Standby Mode .................................................................................... 1158
23.2.5 Module Stop Function ........................................................................................ 1159
23.2.6 All Module Clocks Stop Mode ........................................................................... 1160
23.5.1 I/O Port Status..................................................................................................... 1163
23.5.2 Current Dissipation during Oscillation Stabilization Standby Period................. 1163
23.5.3 EXDMAC, DMAC, and DTC Module Stop....................................................... 1163
23.5.4 On-Chip Peripheral Module Interrupts ............................................................... 1163
23.5.5 Writing to MSTPCR, EXMSTPCR, and RMMSTPCR...................................... 1163
23.5.6 Notes on Clock Division Mode........................................................................... 1164
(EXMSTPCRH, EXMSTPCRL) ........................................................................ 1150
(RMMSTPCRH, RMMSTPCRL)....................................................................... 1151
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