AT90CAN128-15AZ Atmel, AT90CAN128-15AZ Datasheet - Page 82

MCU AVR 128K FLASH 15MHZ 64TQFP

AT90CAN128-15AZ

Manufacturer Part Number
AT90CAN128-15AZ
Description
MCU AVR 128K FLASH 15MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® 90CANr
Datasheets

Specifications of AT90CAN128-15AZ

Package / Case
64-TQFP, 64-VQFP
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
53
Eeprom Size
4K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
CAN, I²C, SPI, UART/USART
Core Size
8-Bit
Processor Series
AT90CANx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
CAN, SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
90C
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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82
AT90CAN32/64/128
Table 9-13
shown in
Table 9-13.
Table 9-14.
Note:
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
1. When enabled, the Two-wire Serial Interface enables Slew-Rate controls on the output pins
Figure 9-5 on page
PD0 and PD1. This is not shown in this table. In addition, spike filters are connected between
the AIO outputs shown in the port figure and the digital logic of the TWI module.
and
Overriding Signals for Alternate Functions PD7..PD4
Overriding Signals for Alternate Functions in PD3..PD0
Table 9-14
PD3/INT3/TXD1
TXEN1
0
TXEN1
1
TXEN1
TXD1
0
INT3 ENABLE
INT3 ENABLE
INT3 INPUT
PD7/T0
0
0
0
0
0
0
0
0
0
T0 INPUT
relates the alternate functions of Port D to the overriding signals
72.
PD6/T1/RXCAN
RXCANEN
PORTD6 • PUD
RXCANEN
0
0
0
0
0
0
T1 INPUT/RXCAN
PD2/INT2/RXD1
RXEN1
PORTD2 • PUD
RXEN1
0
0
0
0
INT2 ENABLE
INT2 ENABLE
INT2 INPUT/RXD1
PD5/XCK1/TXCAN
TXCANEN +
0
TXCANEN
1
TXCANEN + UMSEL1
(XCK1 OUTPUT •
UMSEL1 • TXCANEN) +
(TXCAN • TXCANEN)
0
0
0
XCK1 INPUT
TWEN
SDA INPUT
PD1/INT1/SDA
PORTD1 • PUD
0
0
TWEN
SDA_OUT
0
INT1 ENABLE
INT1 ENABLE
INT1 INPUT
(1)
PD0/INT0/SCL
TWEN
PORTD0 • PUD
0
0
TWEN
SCL_OUT
0
INT0 ENABLE
INT0 ENABLE
INT0 INPUT
SCL INPUT
PD4/ICP1
0
0
0
0
0
0
0
0
0
ICP1 INPUT
7679H–CAN–08/08

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