AT90CAN128-15AZ Atmel, AT90CAN128-15AZ Datasheet - Page 311

MCU AVR 128K FLASH 15MHZ 64TQFP

AT90CAN128-15AZ

Manufacturer Part Number
AT90CAN128-15AZ
Description
MCU AVR 128K FLASH 15MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® 90CANr
Datasheets

Specifications of AT90CAN128-15AZ

Package / Case
64-TQFP, 64-VQFP
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
53
Eeprom Size
4K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
CAN, I²C, SPI, UART/USART
Core Size
8-Bit
Processor Series
AT90CANx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
CAN, SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
90C
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
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7679H–CAN–08/08
Table 23-7.
Signal
Name
COMP
ACLK
ACTEN
ADCBGEN
ADCEN
AMPEN
DAC_9
DAC_8
DAC_7
DAC_6
DAC_5
DAC_4
DAC_3
DAC_2
DAC_1
DAC_0
EXTCH
G10
G20
Boundary-scan Signals for the ADC
Direction
as Seen
from the
ADC
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Comparator Output
Enable 10x gain
Enable 20x gain
Description
Clock signal to gain
stages implemented as
Switch-cap filters
Enable path from gain
stages to the comparator
Enable Band-gap
reference as negative
input to comparator
Power-on signal to the
ADC
Power-on signal to the
gain stages
Bit 9 of digital value to
DAC
Bit 8 of digital value to
DAC
Bit 7 of digital value to
DAC
Bit 6 of digital value to
DAC
Bit 5 of digital value to
DAC
Bit 4 of digital value to
DAC
Bit 3 of digital value to
DAC
Bit 2 of digital value to
DAC
Bit 1 of digital value to
DAC
Bit 0 of digital value to
DAC
Connect ADC channels 0
- 3 to by-pass path
around gain stages
(1)
Recommended
Input
when not in use
AT90CAN32/64/128
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
Output Values when
Recommended Inputs
are Used, and CPU is
not Using the ADC
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
311

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