AT90CAN128-15AZ Atmel, AT90CAN128-15AZ Datasheet - Page 19

MCU AVR 128K FLASH 15MHZ 64TQFP

AT90CAN128-15AZ

Manufacturer Part Number
AT90CAN128-15AZ
Description
MCU AVR 128K FLASH 15MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® 90CANr
Datasheets

Specifications of AT90CAN128-15AZ

Package / Case
64-TQFP, 64-VQFP
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
53
Eeprom Size
4K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
CAN, I²C, SPI, UART/USART
Core Size
8-Bit
Processor Series
AT90CANx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
CAN, SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
90C
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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4.2
7679H–CAN–08/08
SRAM Data Memory
Constant tables can be allocated within the entire program memory address space (see the
LPM – Load Program Memory and ELPM – Extended Load Program Memory instruction
description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 4-1.
Figure 4-2
The AT90CAN32/64/128 is a complex microcontroller with more peripheral units than can be
supported within the 64 locations reserved in the Opcode for the IN and OUT instructions. For
the Extended I/O space in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be
used.
The lower data memory locations address both the Register File, the I/O memory, Extended I/O
memory, and the internal data SRAM. The first 32 locations address the Register File, the next
64 location the standard I/O memory, then 160 locations of Extended I/O memory, and the next
locations address the internal data SRAM (see “ISRAM size”).
An optional external data SRAM can be used with the AT90CAN32/64/128. This SRAM will
occupy an area in the remaining address locations in the 64K address space. This area starts at
the address following the internal SRAM. The Register file, I/O, Extended I/O and Internal SRAM
occupies the lowest bytes, so when using 64 KB (65,536 bytes) of External Memory,
“XMem size” bytes of External Memory are available. See
27
for details on how to take advantage of the external memory map.
shows how the AT90CAN32/64/128 SRAM Memory is organized.
14.
Program Memory Map
Application Flash Section
Boot Flash Section
Program Memory
“External Memory Interface” on page
AT90CAN32/64/128
0x0000
Flash end
“Instruction Execution Tim-
19

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