AT91SAM9R64-CU-999 Atmel, AT91SAM9R64-CU-999 Datasheet - Page 861

• Manufacturer Part Number: AT91SAM9R64-CU-999
• Description: IC MCU ARM9 64K SRAM 144LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9R64-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: SPI, TWI, UART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Operating Supply Voltage: 1.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

44.8.5
44.8.5.1
Table 44-26. SMC Read Signals - NRD Controlled (READ_MODE = 1)
Table 44-27. SMC Read Signals - NCS Controlled (Read_MODE = 0)
6289C–ATARM–28-May-09
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
Symbol
SMC
SMC
1
2
3
4
5
6
7
8
9
SMC
Read Timings
Parameter
VDDIOM supply
Data Setup before NRD High
Data Hold after NRD High
Data Setup before NRD High
Data Hold after NRD High
A2 - A25 Valid before NRD High
NCS low before NRD High
NRD Pulse Width
NBS0/A0, NBS1, NBS2/A1, NBS3,
Parameter
VDDIOM supply
Data Setup before NCS High
Data Hold after NCS High
SMC timings are given in MAX (T = 85°C, VDDCORE = 1.08V) and STH (T = 85°C, VDDCORE
= 1.2V) corners.
Timings are given assuming a capacitance load on data, control and address pads:
Table 44-25. Capacitance Load
In following tables t
IO Supply
3.3V
1.8V
HOLD or NO HOLD SETTINGS (nrd hold ≠ 0, nrd hold =0)
NO HOLD SETTINGS (ncs rd hold = 0)
NO HOLD SETTINGS (nrd hold = 0)
CPMCK
50 pF
30 pF
MAX
HOLD SETTINGS (nrd hold ≠ 0)
nrd pulse - ncs
(nrd setup +
(nrd setup +
t
t
t
nrd pulse)*
nrd pulse *
CPMCK
rd setup) *
CPMCK
CPMCK
1.8V
11.2
is MCK period.
1.8V
Min in STH corner
0
10.9
Corner
8.8
0
0
Min in STH corner
- 0.2
- 1.9
- 1.6
AT91SAM9R64/RL64 Preliminary
50 pF
30 pF
STH
nrd pulse - ncs
(nrd setup +
(nrd setup +
t
t
t
nrd pulse)*
nrd pulse *
CPMCK
rd setup) *
CPMCK
CPMCK
3.3V
10.4
0
3.3V
10.1
8.0
0
0
- 0.3
- 1.9
- 3.2
nrd pulse - ncs
(nrd setup +
(nrd setup +
t
t
t
nrd pulse)*
nrd pulse *
rd setup) *
CPMCK
CPMCK
CPMCK
1.8V
12.5
0
1.8V
Min in MAX corner
12.1
9.6
Min in MAX corner
0
0
- 0.3
- 2.3
- 2.2
nrd pulse - ncs
(nrd setup +
(nrd setup +
t
t
t
nrd pulse)*
nrd pulse *
rd setup) *
CPMCK
CPMCK
CPMCK
3.3V
12.6
3.3V
11.4
0
8.8
0
0
- 0.4
- 2.3
- 3.6
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
861