AT91SAM9R64-CU-999 Atmel, AT91SAM9R64-CU-999 Datasheet - Page 575
![IC MCU ARM9 64K SRAM 144LFBGA](/photos/12/13/121356/144-lfbga_sml.jpg)
AT91SAM9R64-CU-999
Manufacturer Part Number
AT91SAM9R64-CU-999
Description
IC MCU ARM9 64K SRAM 144LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9R64-CU.pdf
(903 pages)
Specifications of AT91SAM9R64-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
SPI, TWI, UART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 575 of 903
- Download datasheet (13Mb)
37.3.3.3
Table 37-1.
Notes:
37.3.3.4
37.3.3.5
6289C–ATARM–28-May-09
BTSIZE, SADDR reloaded
with BTSIZE reloaded and
with BTSIZE reloaded and
buffer of a multiple buffer
with contiguous DADDR
with contiguous SADDR
and DADDR contiguous
1) Single Buffer or Last
2) Multi Buffer transfer
3) Multi Buffer transfer
4) Multi Buffer transfer
5) Multi Buffer transfer
6) Multi Buffer transfer
7) Multi Buffer transfer
8) Multi Buffer transfer
with DADDR reloaded
with SADDR reloaded
BTSIZE, SADDR and
10) Automatic mode
11) Automatic mode
contiguous DADDR
contiguous SADDR
9) Automatic mode
BTsize is reloaded
channel is stalling
DADDR reloaded
with LLI support
Transfer Type
1. USR means that the register field is manually programmed by the user.
2. CONT means that address are contiguous.
3. REP means that the register field is updated with its previous value. If the transfer is the first one, then the user must manu-
4. Channel stalled is true if the relevant BTC interrupt is not masked.
5. LLI means that the register field is updated with the content of the linked list item.
transfer
ally program the value.
Programming DMAC for Multiple Buffer Transfers
Replay Mode of Channel Registers
Contiguous Address Between Buffers
Multiple Buffers Transfer Management Table
AUTO
During automatic replay mode, the channel registers are reloaded with their initial values at the
completion of each buffer and the new values used for the new buffer. Depending on the row
number in
DMAC_CTRLAx and DMAC_CTRLBx channel registers are reloaded from their initial value at
the start of a buffer transfer.
In this case, the address between successive buffers is selected to be a continuation from the
end of the previous buffer. Enabling the source or destination address to be contiguous between
0
0
0
0
0
0
1
1
1
1
1
SRC_REP
–
–
0
–
–
1
–
0
0
1
1
Table 37-1 on page
DST_REP
–
0
–
–
1
–
0
–
0
1
0
SRC_DSCR
AT91SAM9R64/RL64 Preliminary
575, some or all of the DMAC_SADDRx, DMAC_DADDRx,
1
0
1
0
0
1
0
1
1
1
1
DST_DSCR
1
1
0
0
1
0
1
0
1
1
1
BTSIZE
USR
REP
REP
REP
REP
REP
LLI
LLI
LLI
LLI
LLI
SADDR
CONT
CONT
CONT
USR
REP
REP
REP
LLI
LLI
LLI
LLI
DADDR
CONT
CONT
CONT
CONT
USR
REP
REP
LLI
LLI
LLI
LLI
Fields
Other
USR
REP
REP
REP
LLI
LLI
LLI
LLI
LLI
LLI
LLI
575
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