AT91SAM9R64-CU-999 Atmel, AT91SAM9R64-CU-999 Datasheet - Page 858

IC MCU ARM9 64K SRAM 144LFBGA

AT91SAM9R64-CU-999

Manufacturer Part Number
AT91SAM9R64-CU-999
Description
IC MCU ARM9 64K SRAM 144LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9R64-CU-999

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
SPI, TWI, UART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9R64-CU-999
Manufacturer:
Atmel
Quantity:
10 000
44.5.3
Table 44-15. Dynamic Power Consumption
Note:
44.6
Table 44-16. Channel Conversion Time and ADC Clock
Note:
Table 44-17. External Voltage Reference Input
858
Symbol
I
I
I
Parameter
ADC Clock Frequency
Startup Time
Track and Hold Acquisition Time
Conversion Time
Throughput Rate
Parameter
ADVREF Input Voltage Range
ADVREF Average Current
Current Consumption on VDDANA
BIAS
VDDUTMII
VDDUTMIC
1. Including 1 mA due to Pull-up/Pull-down current consumption.
ADC
1. In worst case, the Track-and-Hold Acquisition Time is given by:
AT91SAM9R64/RL64 Preliminary
Dynamic Power Consumption
TTH (ns)
The full speed is obtained for t
ods at maximum clock frequency
To achieve optimal performance of the ADC, the analog power supply VDDANA and the ADVREF input voltage must be
decoupled with a 4.7µF capacitor in parallel with a 100 nF capacitor
Parameter
Bias current consumption on
VBG
HS Transceiver current
consumption
HS Transceiver current
consumption
LS / FS Transceiver current
consumption
LS / FS Transceiver current
consumption
LS / FS Transceiver current
consumption
PLL, Core and Oscillator current
consumption
=
500
+
(
0.08
×
Z
TH
IN
= 1000 ns with an input source impedance of 6250Ohm max, corresponding to 8 clock peri-
.
) Ohm
(
Conditions
Conditions
10-bit resolution mode
Return from Idle Mode
ADC Clock = 4 MHz
ADC Clock = 4 MHz
ADC Clock = 4 MHz
Conditions
HS transmission
HS reception
FS transmission 0m cable
FS transmission 5m cable
FS reception
)
(1)
(1)
(1)
(1)
(1)
(1)
.
Min
2.6
Min
1.0
Min
Typ
3.3
3.33
Typ
Typ
0.7
5.5
47
18
26
4
3
VDDANA
6289C–ATARM–28-May-09
1100
Max
200
Max
220
Max
40
0.8
4.5
4
60
27
30
6
9
Units
Units
kSPS
MHz
Unit
µA
µA
mA
mA
mA
mA
mA
mA
mA
V
µs
µs
µs

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