AT91SAM9R64-CU-999 Atmel, AT91SAM9R64-CU-999 Datasheet - Page 836
![IC MCU ARM9 64K SRAM 144LFBGA](/photos/12/13/121356/144-lfbga_sml.jpg)
AT91SAM9R64-CU-999
Manufacturer Part Number
AT91SAM9R64-CU-999
Description
IC MCU ARM9 64K SRAM 144LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9R64-CU.pdf
(903 pages)
Specifications of AT91SAM9R64-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
SPI, TWI, UART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
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Part Number
Manufacturer
Quantity
Price
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- Download datasheet (13Mb)
43.9.2
6289C–ATARM–28-May-09
Touch Screen Mode
If the PDC is enabled, all the converted data are transferred contiguously in the memory buffer.
The bit LOWRES defines which resolution is used, either 8-bit or 10-bit, and thus the width of the
PDC memory buffer.
Writing TSAMOD to “Touch Screen Only Mode” automatically enables the touch screen pins as
analog inputs, and thus disables the digital function of the corresponding pins.
In Touch Screen Mode, the channels 0 to 3 corresponding to the Touch Screen inputs are auto-
matically activated and the bits CH0 to CH3 are automatically set in the
Status
The remaining channels can be either enabled or disabled by the user and their conversions are
performed at the end of each touch screen sequence.
The resolution is forced to 10 bits, regardless of the LOWRES bit setting.
At each trigger, the following sequence is performed:
The resulting buffer is 16 bits wide and its structure stored in memory is:
7. If Channel 2 is enabled, convert Channel 2 and store result in both TSADCC_CDR2
8. If Channel 3 is enabled, convert Channel 3 and store result in both TSADCC_CDR3
9. If Channel 4 to Channel 5 are enabled, convert the Channels and store result in the cor-
10. If SLEEP is set, sleep down the ADC cell.
1. If SLEEP is set, wake up the ADC cell and wait for the Startup Time.
2. Close the switches on the inputs X
3. Convert Channel X
4. Close the switches on the inputs X
5. Convert Channel X
6. Close the switches on the inputs X
7. Convert Channel Y
8. Close the switches on the inputs Y
9. Convert Channel Y
10. Close the switches on the inputs Y
11. Convert Channel Y
12. Close the switches on the inputs Y
13. Convert Channel X
14. If Channel 4 to Channel 5 are enabled, convert the Channels and store result in the cor-
15. If SLEEP is set, sleep down the ADC cell.
1. X
2. Y
and TSADCC_LCDR.
and TSADCC_LCDR.
responding TSADCC_CDRx and TSADCC_LCDR.
result in both TSADCC_CDR0 and TSADCC_LCDR.
result in both TSADCC_CDR1 and TSADCC_LCDR.
result in both TSADCC_CDR2 and TSADCC_LCDR.
result in both TSADCC_CDR3 and TSADCC_LCDR.
responding TSADCC_CDRx and TSADCC_LCDR.
Register”.
P
P
- X
- X
M
M
P
P
P
P
M
M
, subtract TSADCC_CDR1 from the result and store the subtraction
, subtract TSADCC_CDR1 from the result and store the subtraction
, subtract TSADCC_CDR3 from the result and store the subtraction
, subtract TSADCC_CDR3 from the result and store the subtraction
and store the result in TSADCC_CDR1.
and store the result in TSADCC_CDR3.
AT91SAM9R64/RL64 Preliminary
P
P
P
P
P
P
and X
and X
and X
and Y
and Y
and Y
M
M
M
M
M
M
during the Sample and Hold Time.
during the Sample and Hold Time.
during the Sample and Hold Time.
during the Sample and Hold Time.
during the Sample and Hold Time.
during the Sample and Hold Time.
“TSADCC Channel
836
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