PIC18F87K90-I/PTRSL Microchip Technology, PIC18F87K90-I/PTRSL Datasheet - Page 439
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PIC18F87K90-I/PTRSL
Manufacturer Part Number
PIC18F87K90-I/PTRSL
Description
MCU PIC 128K FLASH XLP 80TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F87K90-I/PTRSL
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
4096Byte
Cpu Speed
16MIPS
No. Of Timers
11
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Timers
11
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
A/d Bit Size
12 bit
A/d Channels Available
24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F87K90-I/PTRSL
Manufacturer:
Maxim
Quantity:
89
Company:
Part Number:
PIC18F87K90-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
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28.2.1
Register 28-16 shows the WDTCON register. This is a
readable and writable register which contains a control
bit that allows software to override the WDT Enable
Configuration bit, but only if the Configuration bit has
disabled the WDT.
REGISTER 28-16: WDTCON: WATCHDOG TIMER CONTROL REGISTER
TABLE 28-2:
2010 Microchip Technology Inc.
RCON
WDTCON
Legend: — = unimplemented, read as ‘ 0 ’. Shaded cells are not used by the Watchdog Timer.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
REGSLP
Name
R/W-0
2:
3:
This bit has no effect if the Configuration bits, WDTEN<1:0>, are enabled.
This bit is available only when ENVREG = 1 and RETEN = 0 .
Not valid unless ULPEN = 1 .
CONTROL REGISTER
REGSLP
IPEN
REGSLP: Regulator Voltage Sleep Enable bit
1 = Regulator goes into Low-Power mode when device’s Sleep mode is enabled
0 = Regulator stays in normal mode when device’s Sleep mode is activated
Unimplemented : Read as ‘ 0 ’
ULPLVL: Ultra Low-Power Wake-up Output bit
1 = Voltage on RA0 > ~0.5V
0 = Voltage on RA0 < ~0.5V
SRETEN: Regulator Voltage Sleep Disable bit
1 = If RETEN (CONFIG1L<0>) = 0 and the regulator is enabled, the device goes into Ultra Low-Power
0 = The regulator is on when device’s Sleep mode is enabled and the Low-Power mode is controlled
Unimplemented : Read as ‘ 0 ’
ULPEN: Ultra Low-Power Wake-up Module Enable bit
1 = Ultra low-power wake-up module is enabled; ULPLVL bit indicates comparator output
0 = Ultra low-power wake-up module is disabled
ULPSINK: Ultra Low-Power Wake-up Current Sink Enable bit
1 = Ultra low-power wake-up current sink is enabled
0 = Ultra low power wake-up current sink is disabled
SWDTEN: Software Controlled Watchdog Timer Enable bit
1 = Watchdog Timer is on
0 = Watchdog Timer is off
Bit 7
SUMMARY OF WATCHDOG TIMER REGISTERS
mode in Sleep
by REGSLP
U-0
—
SBOREN
Bit 6
—
W = Writable bit
‘1’ = Bit is set
ULPLVL
R-x
ULPLVL
Bit 5
CM
(3)
SRETEN
R/W-0
SRETEN
Preliminary
Bit 4
RI
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87K90 FAMILY
(2)
Bit 3
(3)
TO
—
U-0
—
ULPEN
Bit 2
PD
(1)
ULPEN
R/W-0
(3)
ULPSINK SWDTEN
Bit 1
POR
x = Bit is unknown
ULPSINK
R/W-0
Bit 0
BOR
DS39957B-page 439
(3)
SWDTEN
Values on
R/W-0
Reset
Page:
74
74
bit 0
(1)
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