PIC18F87K90-I/PTRSL Microchip Technology, PIC18F87K90-I/PTRSL Datasheet - Page 330

• Manufacturer Part Number: PIC18F87K90-I/PTRSL
• Description: MCU PIC 128K FLASH XLP 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F87K90-I/PTRSL

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 4096Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 11
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 11
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F87K90 FAMILY
21.4.5
The addressing procedure for the I
the first byte after the Start condition usually
determines which device will be the slave addressed by
the master. The exception is the general call address
which can address all devices. When this address is
used, all devices should, in theory, respond with an
Acknowledge.
The general call address is one of eight addresses
reserved for specific purposes by the I
consists of all ‘0’s with R/W = 0.
The general call address is recognized when the
General
(SSPxCON2<7> set). Following a Start bit detect, 8 bits
are shifted into the SSPxSR and the address is
compared against the SSPxADD. It is also compared to
the general call address and fixed in hardware.
FIGURE 21-17:
DS39957B-page 330
GCEN (SSPxCON2<7>)
SSPOV (SSPxCON1<6>)
SDAx
SCLx
SSPxIF
BF (SSPxSTAT<0>)
Call
GENERAL CALL ADDRESS
SUPPORT
Enable
S
SLAVE MODE GENERAL CALL ADDRESS SEQUENCE
(7 OR 10-BIT ADDRESSING MODE)
bit,
1
2
GCEN,
General Call Address
2
C bus is such that
3
2
4
C protocol. It
is
5
enabled
6
Preliminary
7
R/W = 0
8
ACK
If the general call address matches, the SSPxSR is
transferred to the SSPxBUF, the BF flag bit is set
(eighth bit), and on the falling edge of the ninth bit (ACK
bit), the SSPxIF interrupt flag bit is set.
When the interrupt is serviced, the source for the
interrupt can be checked by reading the contents of the
SSPxBUF. The value can be used to determine if the
address was device-specific or a general call address.
In 10-Bit Addressing mode, the SSPxADD is required
to be updated for the second half of the address to
match and the UA bit is set (SSPxSTAT<1>). If the gen-
eral call address is sampled when the GCEN bit is set,
while the slave is configured in 10-Bit Addressing
mode, then the second half of the address is not
necessary, the UA bit will not be set and the slave will
begin
(Figure 21-17).
Address is Compared to General Call Address
after ACK, set interrupt
9
D7
1
receiving
D6
2
Cleared in Software
SSPxBUF is Read
Receiving Data
D5
3
D4
4
data
 2010 Microchip Technology Inc.
D3
5
after
D2
6
D1
7
the
D0
8
Acknowledge
ACK
9
‘0’
‘1’