PIC18F87K90-I/PTRSL Microchip Technology, PIC18F87K90-I/PTRSL Datasheet - Page 401

• Manufacturer Part Number: PIC18F87K90-I/PTRSL
• Description: MCU PIC 128K FLASH XLP 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F87K90-I/PTRSL

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 4096Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 11
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 11
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

26.2
To set up the HLVD module:
1.
2.
3.
4.
5.
26.3
When the module is enabled, the HLVD comparator
and voltage divider are enabled and consume static
current. The total current consumption, when enabled,
is specified in electrical specification parameter D022B
(Table 31-10).
FIGURE 26-2:
 2010 Microchip Technology Inc.
Note:
Select the desired HLVD trip point by writing the
value to the HLVDL<3:0> bits.
Set the VDIRMAG bit to detect high voltage
(VDIRMAG = 1 ) or low voltage (VDIRMAG = 0 ).
Enable the HLVD module by setting the
HLVDEN bit.
Clear the HLVD interrupt flag (PIR2<2>), which
may have been set from a previous interrupt.
If interrupts are desired, enable the HLVD
interrupt by setting the HLVDIE and GIE bits
(PIE2<2> and INTCON<7>, respectively).
An interrupt will not be generated until the
IRVST bit is set.
CASE 1:
CASE 2:
Enable HLVD
Enable HLVD
HLVD Setup
Current Consumption
Before changing any module settings
(V
module (HLVDEN = 0 ), make the changes
and re-enable the module. This prevents
the generation of false HLVD events.
HLVDIF
HLVDIF
DIRMAG
IRVST
IRVST
V
V
DD
DD
, HLVDL<3:0>), first disable the
LOW-VOLTAGE DETECT OPERATION (VDIRMAG = 0)
Internal Reference is Stable
Internal Reference is Stable
Preliminary
T
T
IRVST
IRVST
HLVDIF may Not be Set
PIC18F87K90 FAMILY
HLVDIF Cleared in Software,
HLVDIF Remains Set since HLVD Condition still Exists
Depending on the application, the HLVD module does
not need to operate constantly. To reduce current
requirements, the HLVD circuitry may only need to be
enabled for short periods where the voltage is checked.
After such a check, the module could be disabled.
26.4
The internal reference voltage of the HLVD module,
specified in electrical specification parameter 37
( Section 31.0 “Electrical Characteristics” ), may be
used by other internal circuitry, such as the
programmable Brown-out Reset. If the HLVD or other
circuits using the voltage reference are disabled to
lower the device’s current consumption, the reference
voltage circuit will require time to become stable before
a low or high-voltage condition can be reliably
detected. This start-up time, T
is independent of device clock speed. It is specified in
electrical specification parameter 36 (Table 31-10).
The HLVD interrupt flag is not enabled until T
expired and a stable reference voltage is reached. For
this reason, brief excursions beyond the set point may
not be detected during this interval (see Figure 26-2 or
Figure 26-3).
HLVD Start-up Time
HLVDIF Cleared in Software
HLVDIF Cleared in Software
IRVST
V
V
DS39957B-page 401
, is an interval that
HLVD
HLVD
IRVST
has