PIC18F87K90-I/PTRSL Microchip Technology, PIC18F87K90-I/PTRSL Datasheet - Page 280

• Manufacturer Part Number: PIC18F87K90-I/PTRSL
• Description: MCU PIC 128K FLASH XLP 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F87K90-I/PTRSL

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 4096Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 11
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 11
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F87K90 FAMILY
20.3.2
This mode does not use external resistors, but rather
internal resistor ladders that are configured to generate
the bias voltage.
The internal reference ladder actually consists of three
separate ladders. Disabling the internal reference
ladder disconnects all of the ladders, allowing external
voltages to be supplied.
Depending on the total resistance of the resistor
ladders, the biasing can be classified as low, medium
or high power.
FIGURE 20-4:
DS39957B-page 280
INTERNAL RESISTOR BIASING
LCDBIAS3
LCDBIAS2
LCDBIAS1
A Power Mode
B Power Mode
LRLAT<2:0>
3x Band Gap
LCDCST<2:0>
LCD BIAS INTERNAL RESISTOR LADDER CONNECTION DIAGRAM
V
DDCORE
LCDIRS
LRLAP<1:0>
VLCD3PE
VLCD2PE
VLCD1PE
V
V
DD
DD
Resistor
Ladder
Low
LRLBP<1:0>
Preliminary
LCDIRE
Resistor
Medium
Ladder
Table 20-3 shows the total resistance of each of the
ladders. Figure 20-4 shows the internal resister ladder
connections. When the internal resistor ladder is
selected, the bias voltage can either be from V
from V
TABLE 20-3:
Power Mode
Medium
High
Low
DDCORE
, depending on the LCDIRS setting.
INTERNAL RESISTANCE
LADDER POWER MODES
Resistance of
Entire Ladder
Resistor
Ladder
High
Nominal
300 k
30 k
3 M
 2010 Microchip Technology Inc.
100 A
10 A
I
1 A
DD
DD
or