PIC18F87K90-I/PTRSL Microchip Technology, PIC18F87K90-I/PTRSL Datasheet - Page 361

• Manufacturer Part Number: PIC18F87K90-I/PTRSL
• Description: MCU PIC 128K FLASH XLP 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F87K90-I/PTRSL

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 4096Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 11
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 11
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 22-7:
TABLE 22-6:
 2010 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
PIR3
PIE3
IPR3
RCSTA1
RCREG1
TXSTA1
BAUDCON1 ABDOVF
SPBRGH1
SPBRG1
RCSTA2
RCREG2
TXSTA2
BAUDCON2 ABDOVF
SPBRGH2
SPBRG2
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
Name
Note:
RXx (pin)
Rcv Shift Reg
Rcv Buffer Reg
Read Rcv
Buffer Reg
RCREGx
RCxIF
(Interrupt Flag)
OERR bit
CREN
This timing diagram shows three words appearing on the RXx input. The RCREGx (Receive Buffer) is read after the third word
causing the OERR (Overrun) bit to be set.
EUSART1 Receive Register
EUSART1 Baud Rate Generator Register High Byte
EUSART1 Baud Rate Generator Register Low Byte
EUSART2 Receive Register
EUSART2 Baud Rate Generator Register High Byte
EUSART2 Baud Rate Generator Register Low Byte
GIE/GIEH PEIE/GIEL
TMR5GIF
TMR5GIE
TMR5GIP
CSRC
CSRC
SPEN
SPEN
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
—
—
—
ASYNCHRONOUS RECEPTION
Start
bit
bit 0
RCIDL
RCIDL
LCDIF
LCDIE
LCDIP
ADIE
ADIP
ADIF
Bit 6
RX9
RX9
TX9
TX9
bit 1
TMR0IE
RXDTP
RXDTP
RC1IE
RC1IP
RC2IE
RC2IP
RC1IF
RC2IF
SREN
SREN
TXEN
TXEN
Bit 5
bit 7/8
Preliminary
Stop
TXCKP
TXCKP
INT0IE
CREN
CREN
bit
TX1IF
TX1IE
TX1IP
TX2IF
TX2IE
TX2IP
SYNC
SYNC
Bit 4
Word 1
RCREGx
Start
bit
PIC18F87K90 FAMILY
CTMUIE
CTMUIP
CTMUIF
bit 0
SSP1IF
SSP1IE
SSP1IP
ADDEN
SENDB
ADDEN
SENDB
BRG16
BRG16
RBIE
Bit 3
TMR1GIF
TMR1GIE
TMR1GIP
TMR0IF
CCP2IF
CCP2IE
CCP2IP
bit 7/8
Word 2
RCREGx
BRGH
BRGH
FERR
FERR
Bit 2
—
—
Stop
bit
TMR2IF
TMR2IE
TMR2IP
CCP1IF
CCP1IE
CCP1IP
INT0IF
OERR
OERR
TRMT
TRMT
Start
WUE
WUE
Bit 1
bit
TMR1IF
TMR1IE
TMR1IP
RTCCIF
RTCCIE
RTCCIP
ABDEN
ABDEN
RX9D
RX9D
TX9D
TX9D
bit 7/8
DS39957B-page 361
RBIF
Bit 0
Stop
bit
on Page:
Values
Reset
73
75
75
75
75
75
75
75
75
75
77
74
75
79
80
79
79
80
80