ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 7

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6603P-PLQW

Manufacturer Part Number
ATA6603P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6603P-PLQW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA6603P-PLQW
Manufacturer:
ATMEL
Quantity:
2 000
Part Number:
ATA6603P-PLQW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
3.3.8
3.3.9
3.3.10
3.3.11
3.3.12
3.3.13
4921E–AUTO–09/09
TXD Dominant Time-out Function
Output Pin (RXD)
Enable Input Pin (EN)
Wake Input Pin (WAKE)
MODE Input Pin
TM Input Pin
The TXD input has an internal pull-up resistor. An internal timer prevents the bus line from being
driven permanently in the dominant state. If TXD is forced to low longer than t
LIN bus driver is switched to the recessive state. To reset this dominant time-out mode, TXD
must be switched to high (> 10 µs) before normal data transmission can be started.
This pin reports the state of the LIN bus to the microcontroller. LIN high (recessive state) is
reported by a high level at RXD, LIN low (dominant state) is reported by a low level at RXD. The
output has an internal pull-up structure with typically 5 k to V
defined with an external load capacitor of 20 pF.
The output is short-circuit protected. In Unpowered mode (that is, V
This pin controls the operation mode of the interface. If EN is high, the interface is in Normal
mode, with transmission paths from TXD to LIN and from LIN to RXD both being active. The V
voltage regulator is operating with 5V ±2%/50 mA output capability.
If EN is switched to low while TXD is still high, the device is forced to Silent mode. No data trans-
mission is then possible and the current consumption is reduced to I
capability of the V
If EN is switched to low while TXD is low, the device is forced to Sleep mode. No data transmis-
sion is possible and the voltage regulator is switched off.
This pin is a high voltage input used to wake the device up from Sleep mode. It is usually con-
nected to an external switch in the application to generate a local wake-up. A pull-up current
source with typically 10 µA is implemented.
If you do not need a local wake-up in your application, connect pin WAKE directly to pin VS.
For normal watchdog operation connect pin MODE via an external resistor to GND. For debug-
ging your software you can connect pin MODE to 5V and the watchdog is switched off.
Pin TM is used in final production measurement at Atmel. In the application it is always con-
nected to GND.
DD
regulator is also 50 mA, but the V
DD
tolerance is between 4.65V and 5.35V.
ATA6602/ATA6603
DD
. The AC characteristics can be
S
= 0V), RXD is switched off.
VS
= 50 µA. The current
DOM
> 6 ms, the
DD
7

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