ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 277

• Manufacturer Part Number: ATA6603P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6603P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4921E–AUTO–09/09
Table 4-100. ADC Prescaler Selections
• Bit 4 – ADIF: ADC Interrupt Flag
• Bit 3 – ADIE: ADC Interrupt Enable
• Bits 2:0 – ADPS2:0: ADC Prescaler Select Bits
This bit is set when an ADC conversion completes and the Data Registers are updated. The
ADC Conversion Complete Interrupt is executed if the ADIE bit and the I-bit in SREG are
set. ADIF is cleared by hardware when executing the corresponding interrupt handling vec-
tor. Alternatively, ADIF is cleared by writing a logical one to the flag. Beware that if doing a
Read-Modify-Write on ADCSRA, a pending interrupt can be disabled. This also applies if the
SBI and CBI instructions are used.
When this bit is written to one and the I-bit in SREG is set, the ADC Conversion Complete
Interrupt is activated.
These bits determine the division factor between the system clock frequency and the input
clock to the ADC.
ADPS2
0
0
0
0
1
1
1
1
ADPS1
0
0
1
1
0
0
1
1
ADPS0
0
1
0
1
0
1
0
1
ATA6602/ATA6603
Division Factor
128
16
32
64
2
2
4
8
277