ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 12

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6603P-PLQW

Manufacturer Part Number
ATA6603P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6603P-PLQW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA6603P-PLQW
Manufacturer:
ATMEL
Quantity:
2 000
Part Number:
ATA6603P-PLQW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
3.3.14.4
3.3.14.5
3.3.14.6
12
ATA6602/ATA6603
Pre-normal Mode
Unpowered Mode
Debug Mode
Figure 3-6.
At system power-up the device automatically switches to Pre-normal mode. The voltage regula-
tor is switched on V
to low for t
off and the watchdog is active. The LIN-SBC stays in this mode until EN is switched to high.
If V
Pre-normal mode. During this mode the TXD pin is an output.
If you connect battery voltage to the application circuit, the voltage at the VS pin increases due
to the block capacitor (see
voltage threshold V
V
and the load.
The NRES is low for the reset time delay t
The watchdog is switched off with pin MODE high (5V) and in normal operation if it is tied to
GND.
DD
Regulator
Battery
LIN bus
Voltage
output voltage reaches its nominal value after t
NRES
RXD
VCC
EN
(V
res
S
< 4V) is powered down during Silent mode or Sleep mode, the IC powers up into
= 10 ms and sends a reset to the microcontroller. LIN communication is switched
LIN Wake-up Waveform Diagram from Sleep Mode
DD
S_th
= 5V ±2%/50 mA (see
Bus wake-up filtering time
, the IC mode changes from Unpowered mode to Pre-normal mode. The
Low or floating
Low or floating
Figure 3-8 on page
Off state
t
bus
reset
Figure 3-8 on page
. During this time, no mode change is possible.
15). When V
VDD
Reset
time
Regulator Wake-up time
. This time depends on the V
Pre Normal Mode
S
becomes higher than the V
start-up time delay
Low
On state
Microcontroller
15). The NRES output switches
4921E–AUTO–09/09
operation
Node ln
EN High
Normal Mode
High
DD
capacitor
S
under-

Related parts for ATA6603P-PLQW