ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 132

• Manufacturer Part Number: ATA6603P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6603P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.14.1.1
132
ATA6602/ATA6603
Registers
Figure 4-40. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNT1), Output Compare Registers (OCR1A/B), and Input Capture Regis-
ter (ICR1) are all 16-bit registers. Special procedures must be followed when accessing the
16-bit registers. These procedures are described in the section
page
CPU access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals are all
visible in the Timer Interrupt Flag Register (TIFR1). All interrupts are individually masked with
the Timer Interrupt Mask Register (TIMSK1). TIFR1 and TIMSK1 are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T1 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
133. The Timer/Counter Control Registers (TCCR1A/B) are 8-bit registers and have no
1. Refer to
placement and description.
Table 4-32 on page 95
Timer/Counter
TCCRnA
OCRnA
OCRnB
TCNTn
ICRn
=
=
Direction
Count
Clear
Control Logic
TOP
and
=
TCCRnB
Table 4-38 on page 102
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
(1)
Detector
clk
Edge
= 0
Tn
OCnA
(Int.Req.)
(Int.Req.)
TOVn
(Int.Req.)
OCnB
“Accessing 16-bit Registers” on
Clock Select
Generation
Generation
(From Prescaler)
Waveform
Waveform
Canceler
Detector
Noise
Edge
for Timer/Counter1 pin
Comparator Ouput)
(From Analog
4921E–AUTO–09/09
OCnA
OCnB
ICPn
Tn
T
1
).