ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 125
ATA6603P-PLQW
Manufacturer Part Number
ATA6603P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6603P-PLQW.pdf
(360 pages)
Specifications of ATA6603P-PLQW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number:
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Manufacturer:
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Quantity:
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Manufacturer:
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4921E–AUTO–09/09
Table 4-49
rect PWM mode.
Table 4-49.
Note:
Table 4-50.
Notes:
• Bits 3, 2 – Res: Reserved Bits
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Mode
COM0B1
0
1
2
3
4
5
6
7
These bits are reserved bits in the ATA6602/ATA6603 and will always read as zero.
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the count-
ing sequence of the counter, the source for maximum (TOP) counter value, and what type of
waveform generation to be used (see
Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare Match (CTC)
mode, and two types of Pulse Width Modulation (PWM) modes (see
on page
0
0
1
1
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
1. MAX
2. BOTTOM = 0x00
WGM02
pare Match is ignored, but the set or clear is done at TOP. See
page 119
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
116).
0
0
0
0
1
1
1
1
Compare Output Mode, Phase Correct PWM Mode
Waveform Generation Mode Bit Description
COM0B0
for more details.
= 0xFF
0
1
0
1
WGM01
0
0
1
1
0
0
1
1
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
WGM00
0
1
0
1
0
1
0
1
Timer/Counter
Mode of
Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
Table
4-50). Modes of operation supported by the
ATA6602/ATA6603
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
–
–
(1)
“Phase Correct PWM Mode” on
Immediate
Immediate
Update of
OCRx at
TOP
TOP
TOP
TOP
“Modes of Operation”
–
–
Set on
TOV Flag
BOTTOM
BOTTOM
MAX
MAX
MAX
TOP
–
–
(1)(2)
125
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