ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 123

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6603P-PLQW

Manufacturer Part Number
ATA6603P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6603P-PLQW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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4.12.8
4.12.8.1
4921E–AUTO–09/09
8-bit Timer/Counter Register Description
Timer/Counter Control Register A – TCCR0A
Table 4-44.
Table 4-45
mode.
Table 4-45.
Note:
• Bits 7:6 – COM0A1:0: Compare Match Output A Mode
Initial Value
Read/Write
COM0A1
COM0A1
These bits control the Output Compare pin (OC0A) behavior. If one or both of the
COM0A1:0 bits are set, the OC0A output overrides the normal port functionality of the I/O
pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OC0A pin must be set in order to enable the output driver.
When OC0A is connected to the pin, the function of the COM0A1:0 bits depends on the
WGM02:0 bit setting.
bits are set to a normal or CTC mode (non-PWM).
Bit
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
for more details.
shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast PWM
COM0A1 COM0A0 COM0B1 COM0B0
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
R/W
COM0A0
COM0A0
7
0
0
1
0
1
0
1
0
1
R/W
Table 4-44
6
0
Description
Normal port operation, OC0A disconnected.
Toggle OC0A on Compare Match
Clear OC0A on Compare Match
Set OC0A on Compare Match
Description
Normal port operation, OC0A disconnected.
WGM02 = 0: Normal Port Operation, OC0A Disconnected.
WGM02 = 1: Toggle OC0A on Compare Match.
Clear OC0A on Compare Match, set OC0A at TOP
Set OC0A on Compare Match, clear OC0A at TOP
R/W
5
0
shows the COM0A1:0 bit functionality when the WGM02:0
R/W
4
0
R
3
0
(1)
ATA6602/ATA6603
R
2
0
“Fast PWM Mode” on page 118
WGM01
R/W
1
0
WGM00
R/W
0
0
TCCR0A
123

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