ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 323

• Manufacturer Part Number: ATA6603P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6603P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 5-1.
4921E–AUTO–09/09
Symbol
Notes:
t
t
t
t
t
SU;STO
HD;STA
SU;STA
HD;DAT
SU;DAT
t
t
C
f
t
HIGH
Rp
LOW
SCL
BUF
i
(1)
1. In ATA6602/ATA6603, this parameter is characterized and not 100% tested.
2. Required only for f
3. C
4. f
5. This requirement applies to all ATA6602/ATA6603 2-wire Serial Interface operation. Other devices connected to the 2-wire
6. The actual low period generated by the ATA6602/ATA6603 2-wire Serial Interface is (1/f
7. The actual low period generated by the ATA6602/ATA6603 2-wire Serial Interface is (1/f
Parameter
Capacitance for each I/O Pin
SCL Clock Frequency
Value of Pull-up resistor
Hold Time (repeated) START Condition
Low Period of the SCL Clock
High period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START
condition
Serial Bus need only obey the general f
greater than 6 MHz for the low time requirement to be strictly met at f
requirement will not be strictly met for f
bus may communicate at full speed (400 kHz) with other ATA6602/ATA6603 devices, as well as any other device with a
proper t
CK
b
2-wire Serial Bus Requirements (Continued)
= capacitance of one bus line in pF.
= CPU clock frequency
LOW
acceptance margin.
SCL
> 100 kHz.
SCL
SCL
> 308 kHz when f
requirement.
Condition
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
CK
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
(4)
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
> max(16f
(6)
CK
(7)
SCL
= 8 MHz. Still, ATA6602/ATA6603 devices connected to the
, 250kHz)
SCL
= 100 kHz.
(5)
V
----------------------------
V
----------------------------
CC
CC
3mA
3mA
ATA6602/ATA6603
–
–
Min
250
100
4.0
0.6
4.7
1.3
4.0
0.6
4.7
0.6
4.0
0.6
4.7
1.3
0,4V
0,4V
–
0
0
0
SCL
SCL
- 2/f
- 2/f
CK
CK
), thus f
), thus the low time
1000ns
------------------ -
300ns
--------------- -
Max
3.45
400
0.9
C
C
10
–
–
–
–
–
–
–
–
–
–
–
–
–
–
b
b
CK
must be
Units
kHz
pF
µs
µs
µs
µs
µs
µs
µs
ns
µs
µs
µs
µs
µs
ns
µs
µs
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