ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 57

• Manufacturer Part Number: ATA6603P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6603P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.6.8
4921E–AUTO–09/09
External Clock
Table 4-14.
Note:
The device can utilize a external clock source as shown in
external clock, the CKSEL Fuses must be programmed as shown in
Table 4-15.
Notes:
Figure 4-14. External Clock Drive Configuration
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table
Table 4-16.
BOD enabled
Fast rising power
Slowly rising power
Frequency Range
BOD enabled
Fast rising power
Slowly rising power
Power Conditions
Power Conditions
4-16.
1. If the RSTDISBL fuse is programmed, this start-up time will be increased to
1. The frequency ranges are preliminary values. Actual values are TBD.
2. If 8 MHz frequency exceeds the specification of the device (depends on V
14CK + 4.1 ms to ensure programming mode can be entered.
Fuse can be programmed in order to divide the internal frequency by 8. It must be ensured
that the resulting divided clock meets the frequency specification of the device.
Start-up Times for the 128 kHz Internal Oscillator
Full Swing Crystal Oscillator Operating Modes
Start-up Times for the External Clock Selection
0 - 100
(1)
(MHz)
EXTERNAL
Power-down and Power-save
Power-down and Power-save
SIGNAL
CLOCK
Start-up Time from
Start-up Time from
NC
CKSEL3..0
Reserved
Reserved
6 CK
6 CK
6 CK
6 CK
6 CK
6 CK
0000
XTAL2
XTAL1
GND
Recommended Range for Capacitors C1
Figure
ATA6602/ATA6603
(2)
Additional Delay from
Additional Delay from
Reset (V
14CK + 4.1 ms
14CK + 64 ms
14CK + 65 ms
14CK + 4 ms
4-14. To run the device on an
14CK
Table
and C2 (pF)
Reset
14CK
12 - 22
CC
(1)
= 5.0V)
4-15.
CC
), the CKDIV8
SUT1..0
SUT1..0
00
01
10
11
00
01
10
11
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