MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 681

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

15.8.4
Freescale Semiconductor
•
•
•
•
Available on a single SCI channel (SCI1) implemented by the queue transmit enable (QTE) bit set
by software. When enabled, (QTE = 1) the TDRE bit should be ignored by software and the TC bit
is redefined (as described later).
When the queue is disabled (QTE = 0), the SCI functions in single buffer transfer mode where the
queue size is set to one (QTSZ = 0000), and TDRE and TC function as previously defined.
Locations SCTQ[0:15] can be used as general purpose 9-bit registers. All other bits pertaining to
the queue should be ignored by software.
Programmable queue up to 16 transmits (SCTQ[0:15]) which may allow for infinite and
continuous transmits.
Available transmit wrap function to prevent message breaks for transmits greater than 16. This is
achieved by the transmit wrap enable (QTWE) bit. When QTWE is set, the hardware is allowed to
SCI1 Non-Queue Operation
QSCI1 Additional Transmit Operation Features
Queue CONTROL
Transmitter
Baud Rate
Clock
Figure 15-33. Queue Transmitter Block Enhancements
MPC561/MPC563 Reference Manual, Rev. 1.2
Queue STATUS
H (8) 7 6 5 4 3 2 1 0 L
SC1DR Tx Buffer
10 (11) - Bit
Tx Shift Register
Queue Control
Logic
4-bits
SCI Interrupt Request
SCTQ0
SCTQ1
SCTQ15
Queued Serial Multi-Channel Module
TxD
Data bus
15-63