MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 1358

IC MCU 512K FLASH 56MHZ 388-BGA

MPC564MZP56

Manufacturer Part Number
MPC564MZP56
Description
IC MCU 512K FLASH 56MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Core
PowerPC
Processor Series
MPC5xx
Data Bus Width
32 bit
Maximum Clock Frequency
56 MHz
Data Ram Size
32 KB
On-chip Adc
Yes
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
32
Height
1.95 mm
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Length
27 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
2.7 V, 5.25 V
Supply Voltage (min)
2.5 V, 4.75 V
Width
27 mm
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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66-MHz Electrical Characteristics
G.16 QSMCM Electrical Characteristics
Note: (T
G-52
A
Num
108
109
110
111
112
113
114
115
116
117
118
119
120
= T
L
to T
Operating Frequency
Master
Slave
Cycle Time
Master
Slave
Enable Lead Time
Master
Slave
Enable Lag Time
Master
Slave
Clock (SCK) High or Low Time
Master
Slave
Sequential Transfer Delay
Master
Slave (Does Not Require Deselect)
Data Setup Time (Inputs)
Master
Slave
Data Hold Time (Inputs)
Master
Slave
Slave Access Time
Slave MISO Disable Time
Data Valid (after SCK Edge)
Master
Slave
Data Hold Time (Outputs)
Master
Slave
SCK, MOSI, MISO Rise Time
Input –
Output –
up to 50 pF, SLRC1 bit of PDMCR = “0” (slow)
up to 200 pF, SLRC1 bit of PDMCR = “1” (fast)
up to 200 pF, SLRC1 bit of PDMCR = "0" (slow)
H ,
3
50 pF load on all QSPI pins unless otherwise noted)
Function
1
MPC561/MPC563 Reference Manual, Rev. 1.2
Table G-17. QSPI Timing
Symbol
t
t
QCYC
LEAD
t
t
t
f
t
t
t
t
t
LAG
t
SW
t
DIS
OP
SU
HO
RO
RO
RO
TD
t
t
t
HI
A
V
rI
2*TC– 60
2*TC– n
17*TC
13*TC
4*TC
4*TC
2*TC
2*TC
2*TC
Min
30
20
20
0
0
0
8192 * TC
510 * TC
128 * TC
255 * TC
SCK/2
2 * TC
f
f
SYS
SYS
Max
200
300
TC
50
50
21
1
-
-
-
-
-
/4
/4
Freescale Semiconductor
2
Unit
Hz
Hz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns

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