MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 1155

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

configuration, and not again after that, the bank 1 entry table can be changed to the bank 0 entry table using
the soft reset feature of the TPU3. This procedure is described in the following steps:
The TPU3 stays in reset until the RCPU clears the SOFTRST bit. After the SOFTRST bit has been cleared,
the TPU3 will be reset and the entry table in bank 0 will be selected by default. To select the bank 0 entry
table, write 0b00 to the ETBANK field in TPUMCR2. Always initialize any write-once register to ensure
that an incorrect value is not accidentally written.
The sections below document the bank 0 and bank 1 functions listed in
module.
D.2
PTA starts on a rising or falling edge and accumulates, over a programmable number of periods or pulses,
a 32-bit sum of the total high time, low time, or input signal period. After the specified number of periods
or pulses, the PTA generates an interrupt request.
One to 255 period measurements can be accumulated before the TPU3 interrupts the RCPU, providing
instantaneous or average frequency measurement capability. See Freescale TPU Progamming Note
Programmable Time Accumulator TPU Function (PTA),
interface areas for the PTA function.
Freescale Semiconductor
1. Set ETBANK field in TPUMCR2 to 0b01 to select the entry table in bank 1
2. Run the ID function
3. Stop the TPU3 by setting the STOP bit in the TPUMCR to one
4. Reset the TPU3 by setting the SOFTRST bit in the TPUMCR2 register
5. Wait at least nine clocks
6. Clear the SOFTRST bit in the TPUMCR2 register
Programmable Time Accumulator (PTA)
MPC561/MPC563 Reference Manual, Rev. 1.2
(TPUPN06/D).
Table D-1
Figure D-2
of the TPU3 ROM
shows all of the host
TPU3 ROM Functions
D-3