MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 552

IC MCU 512K FLASH 56MHZ 388-BGA

MPC564MZP56

Manufacturer Part Number
MPC564MZP56
Description
IC MCU 512K FLASH 56MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Core
PowerPC
Processor Series
MPC5xx
Data Bus Width
32 bit
Maximum Clock Frequency
56 MHz
Data Ram Size
32 KB
On-chip Adc
Yes
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
32
Height
1.95 mm
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Length
27 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
2.7 V, 5.25 V
Supply Voltage (min)
2.5 V, 4.75 V
Width
27 mm
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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QADC64E Enhanced Mode Operation
indicating that the module is locked in legacy mode. In order to change the value of the FLIP bit, the
operating mode must first be unlocked by setting the LOCK bit. Only then can the FLIP bit be changed.
Finally, the LOCK bit must be cleared again to protect the state of the FLIP bit from future writes.
14.3.1.4
The QADC64E memory map is divided into two segments: supervisor-only data space and assignable data
space. Access to supervisor-only data space is permitted only when the software is operating in supervisor
access mode. Assignable data space can be either restricted to supervisor-only access or unrestricted to
both supervisor and user data space accesses. The SUPV bit in the QADCMCR designates the assignable
space as supervisor or unrestricted.
The following information applies to accesses to address space located within the module’s 16-bit
boundaries and where the response is a bus error. See
14-10
1. Write LOCK = 1 to unlock operating mode bit.
2. Modify the value of FLIP as required.
3. Write LOCK = 0 and new FLIP bit value to preserve the value of FLIP bit
— FLIP = 0 legacy mode enabled
— FLIP = 1 enhanced mode enabled
Example 1: switching from legacy mode to enhanced mode
— QADCMCR = 0x280; LOCK =1, SUPV = 1
— QADCMCR = 0x380; LOCK =1, write FLIP = 1, SUPV = 1
— QADCMCR = 0x180; LOCK = 0, FLIP = 1, SUPV = 1
Subsequent writes to the FLIP bit will have no effect while LOCK = 0.
Example 2: switching from enhanced mode to legacy mode
— QADCMCR = 0x280 or 0x380; LOCK = 1, SUPV =1 (Can write FLIP = x since value will not
— QADCMCR = 0x280; LOCK = 1, FLIP = 0, SUPV = 1
— QADCMCR = 0x080; LOCK = 0, FLIP = 0, SUPV =1
Attempts to read a supervisor-only data space when not in the supervisor access mode and SUPV
= 1, causes the bus master to assert a bus error condition. No data is returned. If SUPV = 0, the
QADC64E asserts a bus error condition and no data is returned.
Attempts to write to supervisor-only data space when not in the supervisor access mode and SUPV
= 1, causes the bus master to assert a bus error condition. No data is written. If SUPV = 0, the
QADC64E asserts a bus error condition and the register is not written.
Attempts to read unimplemented data space in the unrestricted access mode and
SUPV = 1, causes the bus master to assert a bus error condition and no data is returned. In all other
attempts to read unimplemented data space, the QADC64E causes a bus error condition and no data
is returned.
Attempts to write unimplemented data space in the unrestricted access mode and
SUPV= 1, causes the bus master to assert a bus error condition and no data is written. In all other
change)
Supervisor/Unrestricted Address Space
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 14-6
for more information.
Freescale Semiconductor

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