MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 249

IC MCU 512K FLASH 56MHZ 388-BGA

MPC564MZP56

Manufacturer Part Number
MPC564MZP56
Description
IC MCU 512K FLASH 56MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Core
PowerPC
Processor Series
MPC5xx
Data Bus Width
32 bit
Maximum Clock Frequency
56 MHz
Data Ram Size
32 KB
On-chip Adc
Yes
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
32
Height
1.95 mm
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Length
27 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
2.7 V, 5.25 V
Supply Voltage (min)
2.5 V, 4.75 V
Width
27 mm
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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If programmed to generate an interrupt, the SWT and external pin IRQ0 always generate an NMI,
non-maskable interrupt to the RCPU.
Freescale Semiconductor
Levels[0:7]
ilbs[0:1]
IRQ[0:7]
IMB3
The RCPU takes the system reset exception when an NMI is asserted, the
external interrupt exception for any other asserted interrupt request, and the
decrementer exception when the decrementer MSB changes from 0 to 1.
UIMB
Figure 6-3. MPC561/MPC563 Interrupt Structure
U-bus INT Levels [0:7]
[EICEN, LPMASKEN]
MPC561/MPC563 Reference Manual, Rev. 1.2
EDGE
DET
Change
of Lock
SIUMCR
Timers,
Sequencer
IMBIRQ
LPMASKEN
NOTE
Level 7
Level 6
Level 4
Level 3
Level 2
Level 1
Level 0
Level5
SWT
DEC
I7
I6
I5
I4
I3
I2
I1
I0
I0
Internal
GEN
Bus
NMI
16
48
DEC_IRQ to RCPU
Wake up from
low-power mode
NMI to RCPU
System Configuration and Protection
MUX
USIU
EICEN
Offset in
branch table
IREQ to RCPU
IRQOUT
6
BBC/IMPU
6-9

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