M30833FJGP#U5 Renesas Electronics America, M30833FJGP#U5 Datasheet - Page 527

IC M32C/83 MCU FLASH 100LQFP

M30833FJGP#U5

Manufacturer Part Number
M30833FJGP#U5
Description
IC M32C/83 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30833FJGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Quantity:
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Rev.
REVISION HISTORY
Date
453-461
453-461
Page
314
315
369
384
385
387
393
418
426
434
436
444
451
476
472
• Table 21.36 IEBus Mode Specifications Specification for interrupt request
• Table 21.37 Registers to be Used and Settings Description for the IPOL bit in
Programmable I/O Ports
• Figure 24.2 Programmable I/O Ports (2) Figure modified
• Table 24.1 Unassigned Pin Settings in Single-chip Mode Notes 2, 3, 4, and 6
• Table 24.2 Unassigned Pin Settings in Memory Expansion Mode and
• Figure 24.19 Unassigned Pin Handling Note 2 added
• Table 24.7 Port P10 Peripheral Function Output Control Title modified
Flash Memory Version
Figure 25.2 ROMCP Register Note 4 added
Electrical Characteristics
• 26.2 Electrical Characteristics (M32C/83T) Newly added
• Table 26.3 Electrical Characteristics Minimum standard values for V
• Table 26.23 Memory Expansion Mode and Microprocessor Mode Symbols
• Figure 26.8 V
• Table 26.24 Electrical Characteristics Minimum standard value for V
• Table 26.44 Memory Expansion Mode and Microprocessor Mode Symbols
• Figure 26.8 V
• 26.2 Electrical Characteristics (M32C/83T) Newly added
Precautions
• 27.4.3 Wait Mode modified
• 27.4.4 Stop Mode modified
27.8.2.3 Timer A (One-shot Timer Mode) Information (g) newly added
modified
the G2CR register is modified
added
Microprocessor Mode Notes 2, 3, 4, and 6 added
revised, values for I
one condition of “f(X
for Row Address Output Delay Time and for Row Address Output Hold Time
(BCLK standard) modified
revised
for Row Address Output Delay Time and for Row Address Output Hold Time
(BCLK standard) modified
M32C/83 GROUP (M32C/83, M32C/83T) Hardware Manual
CC
CC
=5 V Timing Diagram (7) Timing for NMI input added
=3.3 V Timing Diagram (7) Timing for NMI input added
CC
IN
C-14
)=32 MHz, square wave, no division” deleted
when f(X
Description
IN
Summary
)=32 MHz, square wave, no division revised,
_______
_______
OH
OH

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