M30833FJGP#U5 Renesas Electronics America, M30833FJGP#U5 Datasheet - Page 380

• Manufacturer Part Number: M30833FJGP#U5
• Description: IC M32C/83 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30833FJGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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22.2 Timing with CAN-Associated Registers
3
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Figure 22.27 Example of CAN Module Reset Operation
2
0
22.2.2 CAN Transmit Timing
C
22.2.1 CAN Module Reset Timing
1
9
3 .
B
8 /
Figure 22.28 shows an operation example of when the CAN transmits a frame.
Figure 22.27 shows an operation example of when the CAN module is reset.
0
1
3
0
(1) When the TRMREQ bit is set to "1" (request to transmit the data frame) while the CAN bus is in as
(2) After a CAN frame transmission is completed, the SENTDATA bit in the C0MCTLi register is set to "1"
3
(1) The CAN module can be reset when the STATE_RESET bit in the C0STR register is set to "1" (CAN
(2) Set necessary CAN-associated registers.
(3) CAN communication can be established after the STATE_RESET bit is set to "0" (resetting) after
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G
4
a
o r
0 -
n
RESET1 bit
STATE_RESET bit
RESET0 bit
idle state, the TRMACTIVE bit in the C0MCTLi register (i=0 to 15) is set to "1" (during transmis-
sion) and the TRMSTATE bit in the C0STR register is set to "1" (during transmission). The CAN
starts transmitting the frame.
(already transmitted), the TRMSUCC bit in the C0STR register to "1" (transmission completed) and
the SISi bit in the C0SISTR register to "1" (interrupt requested). The MBOX3 to MBOX0 bits in the
C0STR register store transmitted message slot numbers.
module reset completed) after the RESET0 and RESET1 bits in the C0CTLR0 register are set to "1"
(CAN module reset).
the RESET0 and RESET1 bits are set to "0" (CAN module reset exited) .
3 .
1
u
, 1
3
p
1
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2
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0
0
3
6
2
C
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"1"
"1"
"0"
"1"
"0"
"0"
3
2
C
Set to "1" by program
simultaneously
f o
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4
3
8
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8
Verify the STATE_RESET bit
Operation (1)
Operation (2)
CAN counfiguration
Verify the STATE_RESET bit
Set to "0" by program
simultaneously
Operation (3)
CAN operation
22. CAN Module