DF2506BR26DV Renesas Electronics America, DF2506BR26DV Datasheet - Page 559

IC H8S/2506 MCU FLASH 176-LFBGA

DF2506BR26DV

Manufacturer Part Number
DF2506BR26DV
Description
IC H8S/2506 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2506BR26DV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2506BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
14.7
14.7.1
The IIC2 is enabled or disabled by setting the module stop control register. In the initial state, the
IIC2 is disabled. After the module stop mode is canceled, registers can be accessed. For details,
see section 22, Power-Down Modes.
14.7.2
Confirm the ninth falling edge of the clock before issuing a stop or a repeated start condition.
The ninth falling edge can be confirmed by monitoring the SCLO bit in the I
2 (ICCR2).
If a stop or a repeated start condition is issued at a certain timing in either of the following cases,
the stop or repeated start condition may be issued incorrectly.
• The rising time of the SCL signal exceeds the time given in section 14.6, Bit Synchronous
• The bit synchronous circuit is activated because a slave device holds the SCL bus low during
14.7.3
The WAIT bit in the I
If the WAIT bit is set to 1, when a slave device holds the SCL signal low more than one transfer
clock cycle during the eights clock, the high level period of the ninth clock may be shorter than a
given period.
Circuit, because of the load on the SCL bus.
the eighth clock.
Setting Module Stop Mode
Issuance of Stop and Repeated Start Conditions
WAIT Bit in I
Note on Usage
2
C bus mode register (ICMR) must be held 0.
2
C Bus Mode Register (ICMR)
Rev. 6.00 Sep. 24, 2009 Page 511 of 928
Section 14 I
2
C bus control register
2
C Bus Interface 2 (IIC2)
REJ09B0099-0600

Related parts for DF2506BR26DV