LPC2478FBD208,551 NXP Semiconductors, LPC2478FBD208,551 Datasheet - Page 532

• Manufacturer Part Number: LPC2478FBD208,551
• Description: IC ARM7 MCU 512K LCD 208-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2478FBD208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2C/I2S/IrDA/SPI/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, DK-35TS-LPC2478, DK-57TS-LPC2478, DK-57VTS-LPC2478, SOMDIMM-LPC2478, SAB-TFBGA208, KSK-LPC2478-JL, MCB2470
• Development Tools By Supplier: OM11015, OM11019, OM11022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1034 - PROGRAMMERS, DEVELOPMENT SYSTEMS622-1033 - KIT LCD TOUCH 5.7" FOR LPC2478MCB2470 - BOARD EVAL NXP LPC247X SERIESOM11022 - EVAL LPC-STICK WITH LPC2478OM11019 - BOARD EVAL FOR LPC2478568-4742 - MODULE DIMM LPC2478 ARM7568-4741 - KIT LCD TOUCH 5.7" FOR LPC2478622-1028 - KIT LCD TOUCH 5.7" FOR LPC2478KSDKLPC2478-PL - KIT IAR KICKSTART NXP LPC2478622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4369 - BOARD EVAL FOR LPC2478622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4363; 935284069551; LPC2478FBD208-S

NXP Semiconductors
UM10237_4
User manual
7.2 SPI Status Register (S0SPSR - 0xE002 0004)
Table 462: SPI Control Register (S0SPCR - address 0xE002 0000) bit description
The S0SPSR register controls the operation of the SPI0 as per the configuration bits
setting.
Table 463: SPI Status Register (S0SPSR - address 0xE002 0004) bit description
Bit
5
6
7
11:8
15:12
Bit
2:0
3
4
Symbol
-
ABRT
MODF
Symbol
MSTR
LSBF
SPIE
BITS
-
Description
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Slave abort. When 1, this bit indicates that a slave abort has
occurred. This bit is cleared by reading this register.
Mode fault. when 1, this bit indicates that a Mode fault error has
occurred. This bit is cleared by reading this register, then writing
the SPI0 control register.
Value Description
0
1
0
1
0
1
1000
1001
1010
1011
1100
1101
1110
1111
0000
Rev. 04 — 26 August 2009
Master mode select.
The SPI operates in Slave mode.
The SPI operates in Master mode.
LSB First controls which direction each byte is shifted
when transferred.
SPI data is transferred MSB (bit 7) first.
SPI data is transferred LSB (bit 0) first.
Serial peripheral interrupt enable.
SPI interrupts are inhibited.
A hardware interrupt is generated each time the SPIF or
MODF bits are activated.
When bit 2 of this register is 1, this field controls the
number of bits per transfer:
8 bits per transfer
9 bits per transfer
10 bits per transfer
11 bits per transfer
12 bits per transfer
13 bits per transfer
14 bits per transfer
15 bits per transfer
16 bits per transfer
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.
Chapter 19: LPC24XX SPI
UM10237
© NXP B.V. 2009. All rights reserved.
Reset Value
NA
0
0
Reset
Value
0
0
0
0000
NA
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