LPC2478FBD208,551 NXP Semiconductors, LPC2478FBD208,551 Datasheet - Page 216
LPC2478FBD208,551
Manufacturer Part Number
LPC2478FBD208,551
Description
IC ARM7 MCU 512K LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(91 pages)
2.OM11077.pdf
(792 pages)
3.OM11077.pdf
(10 pages)
4.LPC2478FBD208551.pdf
(89 pages)
Specifications of LPC2478FBD208,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/IrDA/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, DK-35TS-LPC2478, DK-57TS-LPC2478, DK-57VTS-LPC2478, SOMDIMM-LPC2478, SAB-TFBGA208, KSK-LPC2478-JL, MCB2470
Development Tools By Supplier
OM11015, OM11019, OM11022
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1034 - PROGRAMMERS, DEVELOPMENT SYSTEMS622-1033 - KIT LCD TOUCH 5.7" FOR LPC2478MCB2470 - BOARD EVAL NXP LPC247X SERIESOM11022 - EVAL LPC-STICK WITH LPC2478OM11019 - BOARD EVAL FOR LPC2478568-4742 - MODULE DIMM LPC2478 ARM7568-4741 - KIT LCD TOUCH 5.7" FOR LPC2478622-1028 - KIT LCD TOUCH 5.7" FOR LPC2478KSDKLPC2478-PL - KIT IAR KICKSTART NXP LPC2478622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4369 - BOARD EVAL FOR LPC2478622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4363
935284069551
LPC2478FBD208-S
935284069551
LPC2478FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2478FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
LPC2478FBD208,551
Manufacturer:
NXP/恩智浦
Quantity:
20 000
- OM11077 PDF datasheet
- OM11077 PDF datasheet #2
- OM11077 PDF datasheet #3
- LPC2478FBD208551 PDF datasheet #4
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- Download datasheet (5Mb)
NXP Semiconductors
UM10237_4
User manual
5.4 Overview of DMA operation
5.5 Ethernet Packet
Descriptors, which are stored in memory, contain information about fragments of incoming
or outgoing Ethernet frames. A fragment may be an entire frame or a much smaller
amount of data. Each descriptor contains a pointer to a memory buffer that holds data
associated with a fragment, the size of the fragment buffer, and details of how the
fragment will be transmitted or received.
Descriptors are stored in arrays in memory, which are located by pointer registers in the
Ethernet block. Other registers determine the size of the arrays, point to the next
descriptor in each array that will be used by the DMA engine, and point to the next
descriptor in each array that will be used by the Ethernet device driver.
The DMA engine makes use of a Receive descriptor array and a Transmit descriptor array
in memory. All or part of an Ethernet frame may be contained in a memory buffer
associated with a descriptor. When transmitting, the transmit DMA engine uses as many
descriptors as needed (one or more) to obtain (gather) all of the parts of a frame, and
sends them out in sequence. When receiving, the receive DMA engine also uses as many
descriptors as needed (one or more) to find places to store (scatter) all of the data in the
received frame.
The base address registers for the descriptor array, registers indicating the number of
descriptor array entries, and descriptor array input/output pointers are contained in the
Ethernet block. The descriptor entries and all transmit and receive packet data are stored
in memory which is not a part of the Ethernet block. The descriptor entries tell where
related frame data is stored in memory, certain aspects of how the data is handled, and
the result status of each Ethernet transaction.
Hardware in the DMA engine controls how data incoming from the Ethernet MAC is saved
to memory, causes fragment related status to be saved, and advances the hardware
receive pointer for incoming data. Driver software must handle the disposition of received
data, changing of descriptor data addresses (to avoid unnecessary data movement), and
advancing the software receive pointer. The two pointers create a circular queue in the
descriptor array and allow both the DMA hardware and the driver software to know which
descriptors (if any) are available for their use, including whether the descriptor array is
empty or full.
Similarly, driver software must set up pointers to data that will be transmitted by the
Ethernet MAC, giving instructions for each fragment of data, and advancing the software
transmit pointer for outgoing data. Hardware in the DMA engine reads this information and
sends the data to the Ethernet MAC interface when possible, updating the status and
advancing the hardware transmit pointer.
Figure 11–27
illustrates the different fields in an Ethernet packet.
Rev. 04 — 26 August 2009
Chapter 11: LPC24XX Ethernet
UM10237
© NXP B.V. 2009. All rights reserved.
216 of 792
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