LPC2478FBD208,551 NXP Semiconductors, LPC2478FBD208,551 Datasheet - Page 115
LPC2478FBD208,551
Manufacturer Part Number
LPC2478FBD208,551
Description
IC ARM7 MCU 512K LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(91 pages)
2.OM11077.pdf
(792 pages)
3.OM11077.pdf
(10 pages)
4.LPC2478FBD208551.pdf
(89 pages)
Specifications of LPC2478FBD208,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/IrDA/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, DK-35TS-LPC2478, DK-57TS-LPC2478, DK-57VTS-LPC2478, SOMDIMM-LPC2478, SAB-TFBGA208, KSK-LPC2478-JL, MCB2470
Development Tools By Supplier
OM11015, OM11019, OM11022
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1034 - PROGRAMMERS, DEVELOPMENT SYSTEMS622-1033 - KIT LCD TOUCH 5.7" FOR LPC2478MCB2470 - BOARD EVAL NXP LPC247X SERIESOM11022 - EVAL LPC-STICK WITH LPC2478OM11019 - BOARD EVAL FOR LPC2478568-4742 - MODULE DIMM LPC2478 ARM7568-4741 - KIT LCD TOUCH 5.7" FOR LPC2478622-1028 - KIT LCD TOUCH 5.7" FOR LPC2478KSDKLPC2478-PL - KIT IAR KICKSTART NXP LPC2478622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4369 - BOARD EVAL FOR LPC2478622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4363
935284069551
LPC2478FBD208-S
935284069551
LPC2478FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2478FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
LPC2478FBD208,551
Manufacturer:
NXP/恩智浦
Quantity:
20 000
- OM11077 PDF datasheet
- OM11077 PDF datasheet #2
- OM11077 PDF datasheet #3
- LPC2478FBD208551 PDF datasheet #4
- Current page: 115 of 792
- Download datasheet (5Mb)
NXP Semiconductors
UM10237_4
User manual
3.10 Vector Priority Registers 0-31 (VICVectPriority0-31 - 0xFFFF F200 to
3.12 Software Priority Mask Register (VICSWPriorityMask - 0xFFFF F024)
3.11 Vector Address Register (VICAddress - 0xFFFF FF00)
Table 111. Vector Address registers 0-31 (VICVectAddr0-31 - addresses 0xFFFF F100 to
27C)
These registers select a priority level for the 32 vectored IRQs. There are 16 priority
levels, corresponding to the values 0 through 15 decimal, of which 15 is the lowest priority.
The reset value of these registers defaults all interrupt to the lowest priority, allowing a
single write to elevate the priority of an individual interrupt.
Table 112. Vector Priority registers 0-31 (VICVectPriority0-31 - addresses 0xFFFF F200 to
When an IRQ interrupt occurs, the address of the Interrupt Service Routine (ISR) for the
interrupt that is to be serviced can be read from this register. The address supplied is from
one of the Vector Address Registers (VICVectAddr0-31).
Table 113. Vector Address register (VICAddress - address 0xFFFF FF00) bit description
The Software Priority Mask Register contains individual mask bits for the 16 interrupt
priority levels.
Bit
31:0 VICVectAddr The VIC provides the contents of one of these registers in
Bit
3:0
31:4 -
Bit
31:0 VICAddress Contains the address of the ISR for the currently active interrupt. This
Symbol
Symbol
VICVectPriority Selects one of 16 priority levels for the corresponding vectored
Symbol
0xFFFF F17C) bit description
0xFFFF F27C) bit description
Description
register must be written (with any value) at the end of an ISR, to
update the VIC priority hardware. Writing to the register at any other
time can cause incorrect operation.
response to a read of the Vector Address register (VICAddress
see
Description
register (one of the 32 VICVectAddr registers) that
corresponds to the interrupt that is to be serviced is read from
VICAddress whenever an interrupt occurs.
Description
interrupt.
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
Rev. 04 — 20 August 2009
Section
Chapter 7: LPC24XX Vectored Interrupt Controller (VIC)
7–3.9). The contents of the specific VICVectAddr
UM10237
© NXP B.V. 2009. All rights reserved.
Reset value
0x0000 0000
115 of 792
Reset
value
0
Reset
value
0xF
NA
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