LPC2478FBD208,551 NXP Semiconductors, LPC2478FBD208,551 Datasheet - Page 413

IC ARM7 MCU 512K LCD 208-LQFP

LPC2478FBD208,551

Manufacturer Part Number
LPC2478FBD208,551
Description
IC ARM7 MCU 512K LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2478FBD208,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/IrDA/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, DK-35TS-LPC2478, DK-57TS-LPC2478, DK-57VTS-LPC2478, SOMDIMM-LPC2478, SAB-TFBGA208, KSK-LPC2478-JL, MCB2470
Development Tools By Supplier
OM11015, OM11019, OM11022
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1034 - PROGRAMMERS, DEVELOPMENT SYSTEMS622-1033 - KIT LCD TOUCH 5.7" FOR LPC2478MCB2470 - BOARD EVAL NXP LPC247X SERIESOM11022 - EVAL LPC-STICK WITH LPC2478OM11019 - BOARD EVAL FOR LPC2478568-4742 - MODULE DIMM LPC2478 ARM7568-4741 - KIT LCD TOUCH 5.7" FOR LPC2478622-1028 - KIT LCD TOUCH 5.7" FOR LPC2478KSDKLPC2478-PL - KIT IAR KICKSTART NXP LPC2478622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4369 - BOARD EVAL FOR LPC2478622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4363
935284069551
LPC2478FBD208-S

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NXP Semiconductors
UM10237_4
User manual
Fig 60. Hardware support for B-device switching from peripheral state to host state
drive J on internal host controller port
yes
connect from A-device detected?
set HNP_SUCCESS
set PORT_FUNC[0]
and SE0 on U1
Figure 15–61
the hardware actions setting REMOVE_PU, HNP_SUCCESS, AND HNP_FAILURE. The
relationship of the software actions to the Dual-Role B-Device states is also shown.
B-device states are in bold font with a circle around them.
yes
no
no
no
disconnect device controller from U1
wait 25 μs for bus to settle
bus reset/resume detected?
B_HNP_TRACK = 1 ?
B_HNP_TRACK = 0
set REMOVE_PU
PU_REMOVED set?
shows the actions that the OTG software stack should take in response to
bus suspended ?
idle
no
Rev. 04 — 26 August 2009
no
SE0 sent by host?
bus reset/resume detected?
yes
Chapter 15: LPC24XX USB OTG controller
no
no
yes
reconnect port U1 to the
clear B_HNP_TRACK,
clear PU_REMOVED
set HNP_FAILURE,
PU_REMOVED set?
device controller
connect U1 to host controller
clear B_HNP_TRACK
clear PU_REMOVED
yes
reconnect port U1 to the
device controller
UM10237
© NXP B.V. 2009. All rights reserved.
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